linux-toradex.git/drivers/mtd/chips, branch v2.6.27.50 Linux kernel for Apalis and Colibri modules MTD: [NOR] Fix cfi_send_gen_cmd handling of x16 devices in x8 mode (v4) 2008-11-13T17:55:58+00:00 Eric W. Biederman ebiederm@xmission.com 2008-11-07T00:08:33+00:00 f654ba2b551cecdb3cb4293c40a0e05f033564df commit 467622ef2acb01986eab37ef96c3632b3ea35999 upstream For "unlock" cycles to 16bit devices in 8bit compatibility mode we need to use the byte addresses 0xaaa and 0x555. These effectively match the word address 0x555 and 0x2aa, except the latter has its low bit set. Most chips don't care about the value of the 'A-1' pin in x8 mode, but some -- like the ST M29W320D -- do. So we need to be careful to set it where appropriate. cfi_send_gen_cmd is only ever passed addresses where the low byte is 0x00, 0x55 or 0xaa. Of those, only addresses ending 0xaa are affected by this patch, by masking in the extra low bit when the device is known to be in compatibility mode. [dwmw2: Do it only when (cmd_ofs & 0xff) == 0xaa] v4: Fix stupid typo in cfi_build_cmd_addr that failed to compile I'm writing this patch way to late at night. v3: Bring all of the work back into cfi_build_cmd_addr including calling of map_bankwidth(map) and cfi_interleave(cfi) So every caller doesn't need to. v2: Only modified the address if we our device_type is larger than our bus width. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 
commit 467622ef2acb01986eab37ef96c3632b3ea35999 upstream

For "unlock" cycles to 16bit devices in 8bit compatibility mode we need
to use the byte addresses 0xaaa and 0x555. These effectively match
the word address 0x555 and 0x2aa, except the latter has its low bit set.

Most chips don't care about the value of the 'A-1' pin in x8 mode,
but some -- like the ST M29W320D -- do. So we need to be careful to
set it where appropriate.

cfi_send_gen_cmd is only ever passed addresses where the low byte
is 0x00, 0x55 or 0xaa. Of those, only addresses ending 0xaa are
affected by this patch, by masking in the extra low bit when the device
is known to be in compatibility mode.

[dwmw2: Do it only when (cmd_ofs & 0xff) == 0xaa]
v4: Fix  stupid typo in cfi_build_cmd_addr that failed to compile
    I'm writing this patch way to late at night.
v3: Bring all of the work back into cfi_build_cmd_addr
    including calling of map_bankwidth(map) and cfi_interleave(cfi)
    So every caller doesn't need to.
v2: Only modified the address if we our device_type is larger than our
    bus width.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
[MTD] [NOR] drivers/mtd/chips/jedec_probe.c: fix Am29DL800BB device ID 2008-07-31T07:34:46+00:00 Jerry Hicks hickswgjr@gmail.com 2008-07-30T19:49:59+00:00 4a22442faeb33bdf34016a7b1f6b3d6ecd4e33e5 The device id for Am29DL800BB in jedec_probe.c is wrong. Reference: http://www.spansion.com/datasheets/21519c4.pdf I discovered this while working with u-boot. The u-boot folks mentioned Linux as an upstream reference, thought I'd post a heads-up here too. Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> 
The device id for Am29DL800BB in jedec_probe.c is wrong.

Reference: http://www.spansion.com/datasheets/21519c4.pdf

I discovered this while working with u-boot.

The u-boot folks mentioned Linux as an upstream reference, thought I'd
post a heads-up here too.

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
[MTD] jedec_probe: Fix SST 16-bit chip detection 2008-07-25T14:02:47+00:00 Atsushi Nemoto anemo@mba.ocn.ne.jp 2008-07-15T15:09:15+00:00 ca6f12c67ed19718cf37d0f531af9438de85b70c The unlock_addr rework in kernel 2.6.25 breaks 16-bit SST chips. SST 39LF160 and SST 39VF1601 are both 16-bit only chip (do not have BYTE# pin) and new uaddr value is not correct for them. Add MTD_UADDR_0xAAAA_0x5555 for those chips. Tested with SST 39VF1601 chip. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> 
The unlock_addr rework in kernel 2.6.25 breaks 16-bit SST chips.  SST
39LF160 and SST 39VF1601 are both 16-bit only chip (do not have BYTE#
pin) and new uaddr value is not correct for them.  Add
MTD_UADDR_0xAAAA_0x5555 for those chips.  Tested with SST 39VF1601
chip.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
[MTD] [NOR] Fix -ETIMEO errors in CFI driver 2008-07-25T13:48:42+00:00 Alexey Korolev akorolev@infradead.org 2008-07-16T14:28:56+00:00 998453fbf2e0709bf65ac419718ad284401b2b4f Existing CFI driver has problems with excessive writes during erase. If CFI driver does many writes during one erase cycle we may face the messages with -ETIMEO error on erase operation. It may cause the following data corruption and kernel panics. The reason of the issue is related to specifics of suspend operation: if we write to flash during erase, suspend operation will cost some time to erase procedure (for P30 it could be significant). In current version of cfi driver the problem of many suspends is partially workarounded by adding some time reserv to any operation (8xerase_time) but if we have many writes during one erase the problem appears. This patch detects the suspend and resets timer if suspend occured. It has been well verified on different chips. No problems were found. Could you please include the patch as it is simple and fixes bad issue. Signed-off-by: Alexey Korolev <akorolev@infradead.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> 
Existing CFI driver has problems with excessive writes during erase.
If CFI driver does many writes during one erase cycle we may face the
messages with -ETIMEO error on erase operation.  It may cause the
following data corruption and kernel panics.

The reason of the issue is related to specifics of suspend operation:
if we write to flash during erase, suspend operation will cost some time
to erase procedure (for P30 it could be significant). In current version of
cfi driver the problem of many suspends is partially workarounded by adding
some time reserv to any operation (8xerase_time) but if we have many writes
during one erase the problem appears.

This patch detects the suspend and resets timer if suspend occured. It
has been well verified on different chips. No problems were found.
Could you please include the patch as it is simple and fixes bad issue.

Signed-off-by: Alexey Korolev <akorolev@infradead.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
[MTD] [NOR] gen_probe: No debug message when debugging is disabled 2008-07-11T17:23:11+00:00 Jean Delvare khali@linux-fr.org 2008-07-10T11:37:08+00:00 3a3688b6af103e2c86a7cfc2050988655e184ecc Use pr_debug(...) instead of printk(KERN_DEBUG ...) so that the message is only printed when debugging is enabled. Signed-off-by: Jean Delvare <khali@linux-fr.org> Tested-by: John stoffel <john@stoffel.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> 
Use pr_debug(...) instead of printk(KERN_DEBUG ...) so that the message
is only printed when debugging is enabled.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Tested-by: John stoffel <john@stoffel.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
MTD/JFFS2: remove CVS keywords 2008-06-04T16:50:17+00:00 Adrian Bunk bunk@kernel.org 2008-05-19T22:03:52+00:00 59018b6d2acabb114ab58637e6ab95ba424a89d0 Once upon a time, the MTD repository was using CVS. This patch therefore removes all usages of the no longer updated CVS keywords from the MTD code. This also includes code that printed them to the user. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org> 
Once upon a time, the MTD repository was using CVS.

This patch therefore removes all usages of the no longer updated CVS
keywords from the MTD code.

This also includes code that printed them to the user.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
[MTD] [NOR] Add support for Eon EN29SL800B[BT] NOR flash chips 2008-06-04T16:23:12+00:00 Mike Rapoport mike@compulab.co.il 2008-05-27T08:20:07+00:00 1b0b30acf3fc76e5d4d278fa5a8c9c6ac9898745 This patch add support for non-CFI Eon EN29SL800B[BT] NOR flash chips. The Eon chips have manufacturer ID in the first bank, therefore this patch depends on support for flash chips with ID in bank other than 0. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: David Woodhouse <dwmw2@infradead.org> 
This patch add support for non-CFI Eon EN29SL800B[BT] NOR flash chips.
The Eon chips have manufacturer ID in the first bank, therefore this patch
depends on support for flash chips with ID in bank other than 0.

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
[MTD] [NOR] Add support for flash chips with ID in bank other than 0 2008-06-04T16:22:59+00:00 Mike Rapoport mike@compulab.co.il 2008-05-27T08:20:03+00:00 5c9c11e1c47c2101253a95c54ef72e13edcc728a According to JEDEC "Standard Manufacturer's Identification Code" (http://www.jedec.org/download/search/jep106W.pdf) several first banks of NOR flash can contain 0x7f instead of actual ID. This patch adds support for reading manufacturer ID from banks other than 0. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: David Woodhouse <dwmw2@infradead.org> 
According to JEDEC "Standard Manufacturer's Identification Code"
(http://www.jedec.org/download/search/jep106W.pdf)
several first banks of NOR flash can contain 0x7f instead of actual ID.
This patch adds support for reading manufacturer ID from banks other than 0.

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
[MTD] [NOR] Add support for AMD AM29SL800D[BT] NOR flash chips 2008-06-04T16:20:48+00:00 Mike Rapoport mike@compulab.co.il 2008-05-27T08:19:57+00:00 8fd310a1cc3aadb7a17d844beeefae66b1a169c6 Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: David Woodhouse <dwmw2@infradead.org> 
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
[MTD] [NOR] Support for M50FLW080A and M50FLW080B 2008-05-14T10:03:46+00:00 Nate Case ncase@xes-inc.com 2008-05-13T19:45:29+00:00 deb1a5f1134e7da0e3dacd37b5d32b7fe0600a7f Add support for M50FLW080A and M50FLW080B revisions of LPC flash devices. Signed-off-by: Aaron Lindner <alindner@xes-inc.com> Signed-off-by: Nate Case <ncase@xes-inc.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org> 
Add support for M50FLW080A and M50FLW080B revisions of LPC flash
devices.

Signed-off-by: Aaron Lindner <alindner@xes-inc.com>
Signed-off-by: Nate Case <ncase@xes-inc.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>