linux-toradex.git/drivers/net/phy/at803x.c, branch v4.9

at803x: double check SGMII side autoneg

2016-10-27T20:05:17+00:00

In SGMII mode, we observed an autonegotiation issue
after power-down-up cycles where the copper side
reports successful link establishment but the
SGMII side's link is down.

This happened in a setup where the at8031 is
connected over SGMII to a eTSEC (fsl gianfar),
but so far could not be reproduced with other
Ethernet device / driver combinations.

This commit adds a wrapper function for at8031
that in case of operating in SGMII mode double
checks SGMII link state when generic aneg_done()
succeeds. It prints a warning on failure but
intentionally does not try to recover from this
state. As a result, if you ever see a warning
'803x_aneg_done: SGMII link is not ok' you will
end up having an Ethernet link up but won't get
any data through. This should not happen, if it
does, please contact the module maintainer.

Signed-off-by: Zefir Kurtisi 
Signed-off-by: David S. Miller

Revert "at803x: fix suspend/resume for SGMII link"

2016-10-27T20:05:16+00:00

This reverts commit 98267311fe3b334ae7c107fa0e2413adcf3ba735.

Suspending the SGMII alongside the copper side
made the at803x inaccessable while powered down,
e.g. it can't be re-probed after suspend.

Signed-off-by: Zefir Kurtisi 
Signed-off-by: David S. Miller

net: phy: at803x: only the AT8030 needs a hardware reset on link change

2016-04-28T20:48:21+00:00

Commit 13a56b44 ("at803x: Add support for hardware reset") added a
work-around for a hardware bug on the AT8030.  However, the work-around
was being called for all 803x PHYs, even those that don't need it.
Function at803x_link_change_notify() checks to make sure that it only
resets the PHY on the 8030, but it makes more sense to not call that
function at all if it isn't needed.

Signed-off-by: Timur Tabi 
Reviewed-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: at803x: Request 'reset' GPIO only for AT8030 PHY

2016-03-23T17:39:25+00:00

This removes the dependency on GPIOLIB for non faulty PHYs.

Indeed, without this patch, if GPIOLIB is not selected
devm_gpiod_get_optional() will return -ENOSYS and the driver probe
call will fail, regardless of the actual PHY hardware.

Out of the 3 PHYs supported by this driver (AT8030, AT8031, AT8035),
only AT8030 presents the issues that commit 13a56b449325 ("net: phy:
at803x: Add support for hardware reset") attempts to work-around by
using a 'reset' GPIO line.

Hence, only AT8030 should depend on GPIOLIB operating properly.

Fixes: 13a56b449325 ("net: phy: at803x: Add support for hardware reset")

Signed-off-by: Sebastian Frias 
Signed-off-by: David S. Miller

at803x: fix reset handling

2016-03-23T17:38:40+00:00

The driver of course "knows" that the chip's reset signal is active low,
so  it drives the GPIO to 0  to reset the PHY and to 1 otherwise; however
all this will only work iff the GPIO  is  specified as active-high in the
device tree!  I think both the driver and the device trees (if there are
any -- I was unable to find them) need to be fixed in this case...

Fixes: 13a56b449325 ("net: phy: at803x: Add support for hardware reset")
Signed-off-by: Sergei Shtylyov 
Acked-by: Uwe Kleine-König 
Signed-off-by: David S. Miller

at803x: fix suspend/resume for SGMII link

2016-03-14T02:37:08+00:00

When operating the at803x in SGMII mode, resuming the chip
from power down brings up the copper-side link but leaves
the SGMII link in unconnected state (tested with at8031
attached to gianfar). In effect, this caused a permanent
link loss once the related interface was put down.

This patch ensures that power down handling in supspend()
and resume() is also applied to the SGMII link.

Signed-off-by: Zefir Kurtisi 
Signed-off-by: David S. Miller

net: phy: at803x: Add the interrupt register bit definitions

2016-01-18T00:16:47+00:00

Also use them instead of a magic value when enabling the interrupts.

Signed-off-by: Martin Blumenstingl 
Signed-off-by: David S. Miller

net: phy: at803x: Clean up duplicate register definitions

2016-01-18T00:16:46+00:00

Signed-off-by: Martin Blumenstingl 
Signed-off-by: David S. Miller

net: phy: at803x: Allow specifying the RGMII RX clock delay via phy mode

2016-01-18T00:16:46+00:00

at803x currently automatically enables the RGMII TX clock delay when the
phy interface mode is PHY_INTERFACE_MODE_RGMII_TXID. The same should be
done when PHY_INTERFACE_MODE_RGMII_ID is specified.
Use a similar logic to enable the RGMII RX clock delay as well.
at803x_context_{save,restore} were not touched because these are only
used on AR8030 which is a RMII phy (RGMII clock delays are irrelevant).

Signed-off-by: Martin Blumenstingl 
Signed-off-by: David S. Miller

net: phy: at803x: Don't set gbit features for the AR8030 phy

2016-01-18T00:16:46+00:00

The 8030 is only a "RMII Fast Ethernet PHY", thus it must not have the
SUPPORTED_1000* bits set.

Signed-off-by: Martin Blumenstingl 
Signed-off-by: David S. Miller