linux-toradex.git/drivers/net/tg3.h, branch v2.6.25.20

tg3: 5701 DMA corruption fix

2008-05-01T21:44:31+00:00

[ Upstream commit: 41588ba1ae166eaba0a70abf2d7ff064ad9331d3 ]

Herbert Xu's commit fb93134dfc2a6e6fbedc7c270a31da03fce88db9, entitled
"[TCP]: Fix size calculation in sk_stream_alloc_pskb", has triggered a
bug in the 5701 where the 5701 DMA engine will corrupt outgoing
packets.  This problem only happens when the starting address of the
packet matches a certain range of offsets and only when the 5701 is
placed downstream of a particular Intel bridge.

This patch detects the problematic bridge and if present, readjusts the
starting address of the packet data to a dword aligned boundary.

Signed-off-by: Matt Carlson 
Signed-off-by: Michael Chan 
Signed-off-by: David S. Miller 
Signed-off-by: Greg Kroah-Hartman

[TG3]: Add PHY workaround for 5784

2008-04-04T04:44:44+00:00

The 5784 B step and newer chips require the PHY DSPs to be fine-tuned
based on one-time programmable values stored in the chip.  This is
essential to achieve optimal PHY operations especially when using
long cables.  We also need to properly handle the 10Mbit RX bit in the
CPMU_CTRL register during PHY reset.

Update version to 3.89.

Signed-off-by: Matt Carlson 
Signed-off-by: Michael Chan 
Signed-off-by: David S. Miller

[TG3]: Replace some magic 5704S constants

2008-01-28T22:59:32+00:00

This patch replaces magic values with preprocessor definitions for
the sg_dig_ctrl and sg_dig_status registers.  This is preparatory work
for the next patch.

Signed-off-by: Matt Carlson 
Signed-off-by: Michael Chan 
Signed-off-by: David S. Miller

[TG3]: Separate requested and actual flow control parameters

2008-01-28T22:59:29+00:00

This patch removes the TX and RX flow control flags from tg3_flags and
adds two new flow control variables, flowctrl and active_flowctrl.

Signed-off-by: Matt Carlson 
Signed-off-by: Michael Chan 
Signed-off-by: David S. Miller

[TG3]: Add A1 revs

2007-11-13T05:22:02+00:00

This patch adds the A1 revision of 5784, 5764, and 5761, and applies all
previous bugfixes.  In places where the list of devices gets too long,
the patch uses a new TG3_FLG3_5761_5784_AX_FIXES flag instead.

Signed-off-by: Matt Carlson 
Signed-off-by: Michael Chan 
Signed-off-by: David S. Miller

[TG3]: Prescaler fix

2007-11-13T05:18:04+00:00

Internal hardware timers become inaccurate after link events.  Clock
frequency switches performed by the CPMU fail to adjust timer
prescalers.  The fix is to detect core clock frequency changes during
link events and adjust the timer prescalers accordingly.

Signed-off-by: Matt Carlson 
Signed-off-by: Michael Chan 
Signed-off-by: David S. Miller

[TG3]: Disable GPHY autopowerdown

2007-11-13T05:16:17+00:00

New CPMU devices contend with the GPHY for power management.  The GPHY
autopowerdown feature is enabled by default in the PHY and thus needs to
be disabled after every PHY reset.

Signed-off-by: Matt Carlson 
Signed-off-by: Michael Chan 
Signed-off-by: David S. Miller

[TG3]: Fix nvram selftest failures

2007-11-13T05:10:58+00:00

Newer devices contain bootcode in the chip's private ROM area.  This
bootcode is called selfboot.  Selfboot can be patched in the device's
NVRAM and the patches can have several formats.  In one particular
format, the checksum calculation needs to be slightly modified.  This
patch adjusts the NVRAM test code for that case, and add support for the
missing formats.

Signed-off-by: Matt Carlson 
Signed-off-by: Michael Chan 
Signed-off-by: David S. Miller

[TG3]: 5784 / 5764 DMA engine lockup fix

2007-11-13T05:10:06+00:00

5784 and 5764 devices lock up when the link speed is 10Mbps, the CPMU
link speed mode is enabled, and the MAC clock is running at 1.5Mhz.  The
fix is to run the MAC clock at faster speeds.

Signed-off-by: Matt Carlson 
Signed-off-by: Michael Chan 
Signed-off-by: David S. Miller

[TG3]: 5784 / 5764 GPHY power down fix

2007-11-13T05:08:03+00:00

5784 and 5764 devices fail to link / pass traffic after one load /
unload cycle.  This happens because of a hardware bug in the new CPMU.
During normal operation, the MAC depends on the PHY clock being
available.  When the PHY is powered down, the clock the MAC depends on
is disabled.  The fix is to switch the MAC clock to an alternate source
before powering down the PHY, and to restore the MAC clock to the PHY
source upon device resume.

Signed-off-by: Matt Carlson 
Signed-off-by: Michael Chan 
Signed-off-by: David S. Miller