linux-toradex.git/drivers/ntb/ntb_hw.c, branch v3.13.5 Linux kernel for Apalis and Colibri modules NTB: Disable interrupts and poll under high load 2013-11-20T16:57:34+00:00 Jon Mason jon.mason@intel.com 2013-04-19T00:59:44+00:00 e8aeb60c389c2aa48d345bcf717f8cb7edf67680 Disable interrupts and poll under high load Signed-off-by: Jon Mason <jon.mason@intel.com> 
Disable interrupts and poll under high load

Signed-off-by: Jon Mason <jon.mason@intel.com>
NTB: Enable Snoop on Primary Side 2013-11-20T16:57:33+00:00 Jon Mason jon.mason@intel.com 2013-10-04T00:24:03+00:00 78958433db077b339f3a039890148561086574e4 Enable Snoop from Primary to Secondary side on BAR23 and BAR45 on all TLPs. Previously, Snoop was only enabled from Secondary to Primary side. This can have a performance improvement on some workloads. Also, make the code more obvious about how the link is being enabled. Signed-off-by: Jon Mason <jon.mason@intel.com> 
Enable Snoop from Primary to Secondary side on BAR23 and BAR45 on all
TLPs.  Previously, Snoop was only enabled from Secondary to Primary
side.  This can have a performance improvement on some workloads.

Also, make the code more obvious about how the link is being enabled.

Signed-off-by: Jon Mason <jon.mason@intel.com>
NTB: Document HW errata 2013-11-20T16:57:33+00:00 Jon Mason jon.mason@intel.com 2013-11-01T22:08:19+00:00 58b889206ea4ba75a57986e223da647f91ba1a19 Add a comment describing the necessary ordering of modifications to the NTB Limit and Base registers. Signed-off-by: Jon Mason <jon.mason@intel.com> 
Add a comment describing the necessary ordering of modifications to the
NTB Limit and Base registers.

Signed-off-by: Jon Mason <jon.mason@intel.com>
ntb: Fix missed call to pci_enable_msix() 2013-11-20T16:57:31+00:00 Alexander Gordeev agordeev@redhat.com 2013-10-02T10:49:09+00:00 9739047380a4a1a9f3eba4deea2f5978703b4ecb Current MSI-X enablement code assumes MSI-Xs were successfully allocated in case less than requested vectors were available. That assumption is wrong, since MSI-Xs should be enabled with a repeated call to pci_enable_msix(). This update fixes this. Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Jon Mason <jon.mason@intel.com> 
Current MSI-X enablement code assumes MSI-Xs were successfully
allocated in case less than requested vectors were available.
That assumption is wrong, since MSI-Xs should be enabled with
a repeated call to pci_enable_msix(). This update fixes this.

Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
Signed-off-by: Jon Mason <jon.mason@intel.com>
NTB: Fix NTB-RP Link Up 2013-11-20T16:57:31+00:00 Jon Mason jon.mason@intel.com 2013-09-14T00:05:23+00:00 9fec60c41416c9c40ec520bb79064345d2396632 The Xeon NTB-RP setup, the transparent side does not get a link up/down interrupt. Since the presence of a NTB device on the transparent side means that we have a NTB link up, we can work around the lack of an interrupt by simply calling the link up function to notify the upper layers. Signed-off-by: Jon Mason <jon.mason@intel.com> 
The Xeon NTB-RP setup, the transparent side does not get a link up/down
interrupt.  Since the presence of a NTB device on the transparent side
means that we have a NTB link up, we can work around the lack of an
interrupt by simply calling the link up function to notify the upper
layers.

Signed-off-by: Jon Mason <jon.mason@intel.com>
NTB: Xeon Doorbell errata workaround 2013-11-20T16:57:30+00:00 Jon Mason jon.mason@intel.com 2013-09-06T23:51:16+00:00 c529aa30337b928bd6bc34293608cb3d4505856e Modifications to the 14th bit of the B2BDOORBELL register will not be mirrored to the remote system due to a hardware issue. To get around the issue, shrink the number of available doorbell bits by 1. The max number of doorbells was being used as a way to referencing the Link Doorbell bit. Since this would no longer work, the driver must now explicitly reference that bit. This does not affect the xeon_errata_workaround case, as it is not using the b2bdoorbell register. Signed-off-by: Jon Mason <jon.mason@intel.com> 
Modifications to the 14th bit of the B2BDOORBELL register will not be
mirrored to the remote system due to a hardware issue.  To get around
the issue, shrink the number of available doorbell bits by 1.  The max
number of doorbells was being used as a way to referencing the Link
Doorbell bit.  Since this would no longer work, the driver must now
explicitly reference that bit.

This does not affect the xeon_errata_workaround case, as it is not using
the b2bdoorbell register.

Signed-off-by: Jon Mason <jon.mason@intel.com>
ntb: clean up unnecessary MSI/MSI-X capability find 2013-09-05T18:08:01+00:00 Yijing Wang wangyijing@huawei.com 2013-08-08T13:09:34+00:00 73f47cadfe29f98c48d7fbac4dd79d3e7979ee0b PCI core will initialize device MSI/MSI-X capability in pci_msi_init_pci_dev(). So device driver should use pci_dev->msi_cap/msix_cap to determine whether the device support MSI/MSI-X instead of using pci_find_capability(pci_dev, PCI_CAP_ID_MSI/MSIX). Access to PCIe device config space again will consume more time. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Jon Mason <jon.mason@intel.com> 
PCI core will initialize device MSI/MSI-X capability in
pci_msi_init_pci_dev(). So device driver should use
pci_dev->msi_cap/msix_cap to determine whether the device
support MSI/MSI-X instead of using
pci_find_capability(pci_dev, PCI_CAP_ID_MSI/MSIX).
Access to PCIe device config space again will consume more time.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Jon Mason <jon.mason@intel.com>
NTB: Update Version 2013-09-05T18:08:00+00:00 Jon Mason jon.mason@intel.com 2013-07-30T22:44:05+00:00 db3bb3f07eac9c83c866313c5f54bc80c3b860e5 Update NTB version to 1.0 Signed-off-by: Jon Mason <jon.mason@intel.com> 
Update NTB version to 1.0

Signed-off-by: Jon Mason <jon.mason@intel.com>
NTB: Comment Fix 2013-09-05T18:08:00+00:00 Jon Mason jon.mason@intel.com 2013-07-29T23:46:43+00:00 f9a2cf890b8e6c0a4ce510593f6f3c58394dbcae Add "data" ntb_register_db_callback parameter description comment and correct poor spelling. Signed-off-by: Jon Mason <jon.mason@intel.com> 
Add "data" ntb_register_db_callback parameter description comment and
correct poor spelling.

Signed-off-by: Jon Mason <jon.mason@intel.com>
NTB: Remove References of non-B2B BWD HW 2013-09-05T18:07:59+00:00 Jon Mason jon.mason@intel.com 2013-07-15T22:33:18+00:00 b1ef004303fba92cd28ed32dd3caed3438238f76 NTB-RP is not a supported configuration on BWD hardware. Remove the code attempting to set it up. Signed-off-by: Jon Mason <jon.mason@intel.com> 
NTB-RP is not a supported configuration on BWD hardware.  Remove the
code attempting to set it up.

Signed-off-by: Jon Mason <jon.mason@intel.com>