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<title>linux-toradex.git/drivers/pci/bus.c, branch tegra-10.9.9</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>PCI AER: support Multiple Error Received and no error source id</title>
<updated>2009-06-16T21:30:13+00:00</updated>
<author>
<name>Zhang, Yanmin</name>
<email>yanmin_zhang@linux.intel.com</email>
</author>
<published>2009-06-16T05:34:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=70298c6e6c1ba68346336b4ea54bd5c0abbf73c8'/>
<id>70298c6e6c1ba68346336b4ea54bd5c0abbf73c8</id>
<content type='text'>
Based on PCI Express AER specs, a root port might receive multiple
TLP errors while it could only save a correctable error source id
and an uncorrectable error source id at the same time. In addition,
some root port hardware might be unable to provide a correct source
id, i.e., the source id, or the bus id part of the source id provided
by root port might be equal to 0.

The patchset implements the support in kernel by searching the device
tree under the root port.

Patch 1 changes parameter cb of function pci_walk_bus to return a value.
When cb return non-zero, pci_walk_bus stops more searching on the
device tree.

Reviewed-by: Andrew Patterson &lt;andrew.patterson@hp.com&gt;
Signed-off-by: Zhang Yanmin &lt;yanmin_zhang@linux.intel.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
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<pre>
Based on PCI Express AER specs, a root port might receive multiple
TLP errors while it could only save a correctable error source id
and an uncorrectable error source id at the same time. In addition,
some root port hardware might be unable to provide a correct source
id, i.e., the source id, or the bus id part of the source id provided
by root port might be equal to 0.

The patchset implements the support in kernel by searching the device
tree under the root port.

Patch 1 changes parameter cb of function pci_walk_bus to return a value.
When cb return non-zero, pci_walk_bus stops more searching on the
device tree.

Reviewed-by: Andrew Patterson &lt;andrew.patterson@hp.com&gt;
Signed-off-by: Zhang Yanmin &lt;yanmin_zhang@linux.intel.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI/x86: don't assume prefetchable ranges are 64bit</title>
<updated>2009-06-11T19:04:06+00:00</updated>
<author>
<name>Yinghai Lu</name>
<email>yinghai@kernel.org</email>
</author>
<published>2009-04-24T03:48:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1f82de10d6b1d845155363c895c552e61b36b51a'/>
<id>1f82de10d6b1d845155363c895c552e61b36b51a</id>
<content type='text'>
We should not assign 64bit ranges to PCI devices that only take 32bit
prefetchable addresses.

Try to set IORESOURCE_MEM_64 in 64bit resource of pci_device/pci_bridge
and make the bus resource only have that bit set when all devices under
it support 64bit prefetchable memory.  Use that flag to allocate
resources from that range.

Reported-by: Yannick &lt;yannick.roehlly@free.fr&gt;
Reviewed-by: Ivan Kokshaysky &lt;ink@jurassic.park.msu.ru&gt;
Signed-off-by: Yinghai Lu &lt;yinghai@kernel.org&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
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<pre>
We should not assign 64bit ranges to PCI devices that only take 32bit
prefetchable addresses.

Try to set IORESOURCE_MEM_64 in 64bit resource of pci_device/pci_bridge
and make the bus resource only have that bit set when all devices under
it support 64bit prefetchable memory.  Use that flag to allocate
resources from that range.

Reported-by: Yannick &lt;yannick.roehlly@free.fr&gt;
Reviewed-by: Ivan Kokshaysky &lt;ink@jurassic.park.msu.ru&gt;
Signed-off-by: Yinghai Lu &lt;yinghai@kernel.org&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Setup disabled bridges even if buses are added</title>
<updated>2009-04-06T18:25:06+00:00</updated>
<author>
<name>Yuji Shimada</name>
<email>shimada-yxb@necst.nec.co.jp</email>
</author>
<published>2009-04-03T07:41:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=296ccb086dfb89b5b8d73ef08c795ffdff12a597'/>
<id>296ccb086dfb89b5b8d73ef08c795ffdff12a597</id>
<content type='text'>
This patch sets up disabled bridges even if buses have already been
added.

pci_assign_unassigned_resources is called after buses are added.
pci_assign_unassigned_resources calls pci_bus_assign_resources.
pci_bus_assign_resources calls pci_setup_bridge to configure BARs of
bridges.

Currently pci_setup_bridge returns immediately if the bus have already
been added. So pci_assign_unassigned_resources can't configure BARs of
bridges that were added in a disabled state; this patch fixes the issue.

On logical hot-add, we need to prevent the kernel from re-initializing
bridges that have already been initialized. To achieve this,
pci_setup_bridge returns immediately if the bridge have already been
enabled.

We don't need to check whether the specified bus is a root bus or not.
pci_setup_bridge is not called on a root bus, because a root bus does
not have a bridge.

The patch adds a new helper function, pci_is_enabled. I made the
function name similar to pci_is_managed. The codes which use
enable_cnt directly are changed to use pci_is_enabled.

Acked-by: Alex Chiang &lt;achiang@hp.com&gt;
Signed-off-by: Yuji Shimada &lt;shimada-yxb@necst.nec.co.jp&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</content>
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<pre>
This patch sets up disabled bridges even if buses have already been
added.

pci_assign_unassigned_resources is called after buses are added.
pci_assign_unassigned_resources calls pci_bus_assign_resources.
pci_bus_assign_resources calls pci_setup_bridge to configure BARs of
bridges.

Currently pci_setup_bridge returns immediately if the bus have already
been added. So pci_assign_unassigned_resources can't configure BARs of
bridges that were added in a disabled state; this patch fixes the issue.

On logical hot-add, we need to prevent the kernel from re-initializing
bridges that have already been initialized. To achieve this,
pci_setup_bridge returns immediately if the bridge have already been
enabled.

We don't need to check whether the specified bus is a root bus or not.
pci_setup_bridge is not called on a root bus, because a root bus does
not have a bridge.

The patch adds a new helper function, pci_is_enabled. I made the
function name similar to pci_is_managed. The codes which use
enable_cnt directly are changed to use pci_is_enabled.

Acked-by: Alex Chiang &lt;achiang@hp.com&gt;
Signed-off-by: Yuji Shimada &lt;shimada-yxb@necst.nec.co.jp&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: do not enable bridges more than once</title>
<updated>2009-03-20T21:57:36+00:00</updated>
<author>
<name>Alex Chiang</name>
<email>achiang@hp.com</email>
</author>
<published>2009-03-20T20:56:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9dd90cafa7a712d283e2e0c625b022e19f746762'/>
<id>9dd90cafa7a712d283e2e0c625b022e19f746762</id>
<content type='text'>
In preparation for PCI core hotplug, we need to ensure that we do
not attempt to re-enable bridges that have already been enabled.

Reported-by: Kenji Kaneshige &lt;kaneshige.kenji@jp.fujitsu.com&gt;
Signed-off-by: Alex Chiang &lt;achiang@hp.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In preparation for PCI core hotplug, we need to ensure that we do
not attempt to re-enable bridges that have already been enabled.

Reported-by: Kenji Kaneshige &lt;kaneshige.kenji@jp.fujitsu.com&gt;
Signed-off-by: Alex Chiang &lt;achiang@hp.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: constify pci_bus_add_devices()</title>
<updated>2009-03-20T02:29:35+00:00</updated>
<author>
<name>akpm@linux-foundation.org</name>
<email>akpm@linux-foundation.org</email>
</author>
<published>2009-02-03T23:45:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c48f1670f42b71f39f4a3bfba01ffb691cc9206c'/>
<id>c48f1670f42b71f39f4a3bfba01ffb691cc9206c</id>
<content type='text'>
drivers/pci/hotplug/fakephp.c:283: warning: passing argument 1 of 'pci_bus_add_devices' discards qualifiers from pointer target type

Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</content>
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<pre>
drivers/pci/hotplug/fakephp.c:283: warning: passing argument 1 of 'pci_bus_add_devices' discards qualifiers from pointer target type

Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: factor pci_bus_add_child() from pci_bus_add_devices()</title>
<updated>2009-01-07T19:13:06+00:00</updated>
<author>
<name>Yu Zhao</name>
<email>yu.zhao@intel.com</email>
</author>
<published>2008-11-21T18:42:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=876e501ab25dcd683574a5d3d56d8fe450083ed6'/>
<id>876e501ab25dcd683574a5d3d56d8fe450083ed6</id>
<content type='text'>
This patch splits a new function, pci_bus_add_child(), from
pci_bus_add_devices(). The new function can be used to register PCI
buses to the device core.

Signed-off-by: Yu Zhao &lt;yu.zhao@intel.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</content>
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<pre>
This patch splits a new function, pci_bus_add_child(), from
pci_bus_add_devices(). The new function can be used to register PCI
buses to the device core.

Signed-off-by: Yu Zhao &lt;yu.zhao@intel.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: cleanup pci_bus_add_devices()</title>
<updated>2009-01-07T19:13:05+00:00</updated>
<author>
<name>Yu Zhao</name>
<email>yu.zhao@intel.com</email>
</author>
<published>2008-11-21T18:41:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3fa16fdb48e0d83c2acf46e357548c89891df58b'/>
<id>3fa16fdb48e0d83c2acf46e357548c89891df58b</id>
<content type='text'>
Cleanup pci_bus_add_devices() by negating the conditional and
continuing, rather than having a single conditional take up the whole
body.

Signed-off-by: Yu Zhao &lt;yu.zhao@intel.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Cleanup pci_bus_add_devices() by negating the conditional and
continuing, rather than having a single conditional take up the whole
body.

Signed-off-by: Yu Zhao &lt;yu.zhao@intel.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Add legacy_io/mem to all busses</title>
<updated>2009-01-07T19:12:25+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2008-11-12T03:38:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d3a54014e2a94bd37b7dee5e76e03f7bc4fab49a'/>
<id>d3a54014e2a94bd37b7dee5e76e03f7bc4fab49a</id>
<content type='text'>
Currently, only PHBs get the legacy_* files, which makes it tricky for
userland to get access to the legacy space.  This commit exposes them in
every bus, since even child buses may forward legacy cycles if
configured properly.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</content>
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<pre>
Currently, only PHBs get the legacy_* files, which makes it tricky for
userland to get access to the legacy space.  This commit exposes them in
every bus, since even child buses may forward legacy cycles if
configured properly.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: make CPU list affinity visible</title>
<updated>2008-10-20T17:53:51+00:00</updated>
<author>
<name>Mike Travis</name>
<email>travis@sgi.com</email>
</author>
<published>2008-09-06T12:46:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=93ff68a55aa92180a765d6c51c3303f6200167a6'/>
<id>93ff68a55aa92180a765d6c51c3303f6200167a6</id>
<content type='text'>
Stephen Hemminger wrote:
&gt; Looks like Mike created cpulistaffinty in sysfs but never completed
&gt; the job.

This patch hooks things up correctly, taking care to remove the new file
when the bus is destroyed.

Signed-off-by: Stephen Hemminger &lt;shemminger@vyatta.com&gt;
Signed-off-by: Mike Travis &lt;travis@sgi.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</content>
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<pre>
Stephen Hemminger wrote:
&gt; Looks like Mike created cpulistaffinty in sysfs but never completed
&gt; the job.

This patch hooks things up correctly, taking care to remove the new file
when the bus is destroyed.

Signed-off-by: Stephen Hemminger &lt;shemminger@vyatta.com&gt;
Signed-off-by: Mike Travis &lt;travis@sgi.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: remove global list of PCI devices</title>
<updated>2008-04-21T04:47:02+00:00</updated>
<author>
<name>Greg Kroah-Hartman</name>
<email>gregkh@suse.de</email>
</author>
<published>2008-02-14T22:56:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5ff580c10ec06fd296bd23d4570c1a95194094a0'/>
<id>5ff580c10ec06fd296bd23d4570c1a95194094a0</id>
<content type='text'>
This patch finally removes the global list of PCI devices.  We are
relying entirely on the list held in the driver core now, and do not
need a separate "shadow" list as no one uses it.

Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
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<pre>
This patch finally removes the global list of PCI devices.  We are
relying entirely on the list held in the driver core now, and do not
need a separate "shadow" list as no one uses it.

Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</pre>
</div>
</content>
</entry>
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