<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/pci/controller/Kconfig, branch v5.5</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/mmio-dma-ranges'</title>
<updated>2019-11-28T14:54:53+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-11-28T14:54:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7bd4c4a7b0ff94ef01247f905cd568fb67c747e0'/>
<id>7bd4c4a7b0ff94ef01247f905cd568fb67c747e0</id>
<content type='text'>
  - Consolidate DT "dma-ranges" parsing and convert all host drivers to use
    shared parsing (Rob Herring)

* remotes/lorenzo/pci/mmio-dma-ranges:
  PCI: Make devm_of_pci_get_host_bridge_resources() static
  PCI: rcar: Use inbound resources for setup
  PCI: iproc: Use inbound resources for setup
  PCI: xgene: Use inbound resources for setup
  PCI: v3-semi: Use inbound resources for setup
  PCI: ftpci100: Use inbound resources for setup
  PCI: of: Add inbound resource parsing to helpers
  PCI: versatile: Enable COMPILE_TEST
  PCI: versatile: Remove usage of PHYS_OFFSET
  PCI: versatile: Use pci_parse_request_of_pci_ranges()
  PCI: xilinx-nwl: Use pci_parse_request_of_pci_ranges()
  PCI: xilinx: Use pci_parse_request_of_pci_ranges()
  PCI: xgene: Use pci_parse_request_of_pci_ranges()
  PCI: v3-semi: Use pci_parse_request_of_pci_ranges()
  PCI: rockchip: Drop storing driver private outbound resource data
  PCI: rockchip: Use pci_parse_request_of_pci_ranges()
  PCI: mobiveil: Use pci_parse_request_of_pci_ranges()
  PCI: mediatek: Use pci_parse_request_of_pci_ranges()
  PCI: iproc: Use pci_parse_request_of_pci_ranges()
  PCI: faraday: Use pci_parse_request_of_pci_ranges()
  PCI: dwc: Use pci_parse_request_of_pci_ranges()
  PCI: altera: Use pci_parse_request_of_pci_ranges()
  PCI: aardvark: Use pci_parse_request_of_pci_ranges()
  PCI: Export pci_parse_request_of_pci_ranges()
  resource: Add a resource_list_first_type helper

# Conflicts:
#	drivers/pci/controller/pcie-rcar.c
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  - Consolidate DT "dma-ranges" parsing and convert all host drivers to use
    shared parsing (Rob Herring)

* remotes/lorenzo/pci/mmio-dma-ranges:
  PCI: Make devm_of_pci_get_host_bridge_resources() static
  PCI: rcar: Use inbound resources for setup
  PCI: iproc: Use inbound resources for setup
  PCI: xgene: Use inbound resources for setup
  PCI: v3-semi: Use inbound resources for setup
  PCI: ftpci100: Use inbound resources for setup
  PCI: of: Add inbound resource parsing to helpers
  PCI: versatile: Enable COMPILE_TEST
  PCI: versatile: Remove usage of PHYS_OFFSET
  PCI: versatile: Use pci_parse_request_of_pci_ranges()
  PCI: xilinx-nwl: Use pci_parse_request_of_pci_ranges()
  PCI: xilinx: Use pci_parse_request_of_pci_ranges()
  PCI: xgene: Use pci_parse_request_of_pci_ranges()
  PCI: v3-semi: Use pci_parse_request_of_pci_ranges()
  PCI: rockchip: Drop storing driver private outbound resource data
  PCI: rockchip: Use pci_parse_request_of_pci_ranges()
  PCI: mobiveil: Use pci_parse_request_of_pci_ranges()
  PCI: mediatek: Use pci_parse_request_of_pci_ranges()
  PCI: iproc: Use pci_parse_request_of_pci_ranges()
  PCI: faraday: Use pci_parse_request_of_pci_ranges()
  PCI: dwc: Use pci_parse_request_of_pci_ranges()
  PCI: altera: Use pci_parse_request_of_pci_ranges()
  PCI: aardvark: Use pci_parse_request_of_pci_ranges()
  PCI: Export pci_parse_request_of_pci_ranges()
  resource: Add a resource_list_first_type helper

# Conflicts:
#	drivers/pci/controller/pcie-rcar.c
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: cadence: Move all files to per-device cadence directory</title>
<updated>2019-11-11T14:57:02+00:00</updated>
<author>
<name>Tom Joseph</name>
<email>tjoseph@cadence.com</email>
</author>
<published>2019-11-11T12:30:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=de80f95ccb9c4de5a0fae0334de5ab438acf3453'/>
<id>de80f95ccb9c4de5a0fae0334de5ab438acf3453</id>
<content type='text'>
Cadence core library files may be used by various platform drivers.
Add a new directory "cadence" to group all the Cadence core library files
and the platforms using Cadence core library.

Signed-off-by: Tom Joseph &lt;tjoseph@cadence.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Cadence core library files may be used by various platform drivers.
Add a new directory "cadence" to group all the Cadence core library files
and the platforms using Cadence core library.

Signed-off-by: Tom Joseph &lt;tjoseph@cadence.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: cadence: Refactor driver to use as a core library</title>
<updated>2019-11-11T14:56:54+00:00</updated>
<author>
<name>Tom Joseph</name>
<email>tjoseph@cadence.com</email>
</author>
<published>2019-11-11T12:30:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bd22885aa188f135fd98382febfec650601ec998'/>
<id>bd22885aa188f135fd98382febfec650601ec998</id>
<content type='text'>
Cadence PCIe host and endpoint IP may be embedded into a variety of
SoCs/platforms. Let's extract the platform related APIs/Structures in the
current driver to a separate file (pcie-cadence-plat.c), such that the
common functionality can be used by future platforms.

Signed-off-by: Tom Joseph &lt;tjoseph@cadence.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Cadence PCIe host and endpoint IP may be embedded into a variety of
SoCs/platforms. Let's extract the platform related APIs/Structures in the
current driver to a separate file (pcie-cadence-plat.c), such that the
common functionality can be used by future platforms.

Signed-off-by: Tom Joseph &lt;tjoseph@cadence.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: versatile: Enable COMPILE_TEST</title>
<updated>2019-10-29T10:52:29+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2019-10-28T16:32:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ecf8fd6d917dca1065e1021ff7fc6b6c282373f9'/>
<id>ecf8fd6d917dca1065e1021ff7fc6b6c282373f9</id>
<content type='text'>
Since commit a574795bc383 ("PCI: generic,versatile: Remove unused
pci_sys_data structures") the build dependency on ARM is gone, so let's
enable COMPILE_TEST for versatile.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Since commit a574795bc383 ("PCI: generic,versatile: Remove unused
pci_sys_data structures") the build dependency on ARM is gone, so let's
enable COMPILE_TEST for versatile.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: hv: Add a Hyper-V PCI interface driver for software backchannel interface</title>
<updated>2019-08-22T07:25:12+00:00</updated>
<author>
<name>Haiyang Zhang</name>
<email>haiyangz@microsoft.com</email>
</author>
<published>2019-08-22T05:05:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=348dd93e40c112afda3cd07daa6f470e474d29dc'/>
<id>348dd93e40c112afda3cd07daa6f470e474d29dc</id>
<content type='text'>
This interface driver is a helper driver allows other drivers to
have a common interface with the Hyper-V PCI frontend driver.

Signed-off-by: Haiyang Zhang &lt;haiyangz@microsoft.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This interface driver is a helper driver allows other drivers to
have a common interface with the Hyper-V PCI frontend driver.

Signed-off-by: Haiyang Zhang &lt;haiyangz@microsoft.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: altera-msi: Allow building as module</title>
<updated>2019-05-30T14:34:54+00:00</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2019-04-24T04:57:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c7ddfd3514f2702a70e9ff86504cafa856dd16b2'/>
<id>c7ddfd3514f2702a70e9ff86504cafa856dd16b2</id>
<content type='text'>
Altera MSI IP is a soft IP and is only available after
an FPGA image (with design containing it) is programmed.

Make driver modulable to support use case FPGA image is programmed the
after kernel has booted, so that the driver can be loaded upon request.

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Altera MSI IP is a soft IP and is only available after
an FPGA image (with design containing it) is programmed.

Make driver modulable to support use case FPGA image is programmed the
after kernel has booted, so that the driver can be loaded upon request.

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: altera: Allow building as module</title>
<updated>2019-05-30T14:28:01+00:00</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2019-04-24T04:57:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ec15c4d0d5d2e431169fbdf6c6bcf0c8ff71ef22'/>
<id>ec15c4d0d5d2e431169fbdf6c6bcf0c8ff71ef22</id>
<content type='text'>
Altera PCIe Rootport IP is a soft IP and is only available after
an FPGA image (whose design contains it) is programmed.

Make driver modulable to support use cases when FPGA image is
programmed after the kernel has booted, so that the driver
can be loaded upon request.

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Altera PCIe Rootport IP is a soft IP and is only available after
an FPGA image (whose design contains it) is programmed.

Make driver modulable to support use cases when FPGA image is
programmed after the kernel has booted, so that the driver
can be loaded upon request.

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/pci: Clean up usage of X86_DEV_DMA_OPS</title>
<updated>2019-04-24T11:12:05+00:00</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2019-04-10T08:02:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=15854edd193ae5d9daf8f50ce5f9f1724cebe344'/>
<id>15854edd193ae5d9daf8f50ce5f9f1724cebe344</id>
<content type='text'>
We have supported per-device dma_map_ops in generic code for a long
time, and this symbol just guards the inclusion of the dma_map_ops
registry used for vmd.  Stop enabling it for anything but vmd.

No change in functionality intended.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/20190410080220.21705-3-hch@lst.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We have supported per-device dma_map_ops in generic code for a long
time, and this symbol just guards the inclusion of the dma_map_ops
registry used for vmd.  Stop enabling it for anything but vmd.

No change in functionality intended.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/20190410080220.21705-3-hch@lst.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: altera: Enable driver on ARM64</title>
<updated>2019-03-04T12:22:19+00:00</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2019-02-28T10:52:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5fd831cd16772188c3dd0ed9bb96418d883b4a51'/>
<id>5fd831cd16772188c3dd0ed9bb96418d883b4a51</id>
<content type='text'>
Enable PCIE_ALTERA on ARM64 platform.

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable PCIE_ALTERA on ARM64 platform.

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/mediatek'</title>
<updated>2018-10-20T16:45:53+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2018-10-20T16:45:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4dd4d99636778ab610ad7ccb96a20b015991bdcf'/>
<id>4dd4d99636778ab610ad7ccb96a20b015991bdcf</id>
<content type='text'>
  - Fix Mediatek unchecked return value from devm_pci_remap_iospace()
    (Gustavo A. R. Silva)

  - Fix Mediatek endpoint/port matching logic (Honghui Zhang)

  - Change Mediatek Root Port Class Code to PCI_CLASS_BRIDGE_PCI (Honghui
    Zhang)

  - Remove redundant Mediatek PM domain check (Honghui Zhang)

  - Convert Mediatek to pci_host_probe() (Honghui Zhang)

  - Fix Mediatek MSI enablement (Honghui Zhang)

  - Add Mediatek system PM support for MT2712 and MT7622 (Honghui Zhang)

  - Add Mediatek loadable module support (Honghui Zhang)

* remotes/lorenzo/pci/mediatek:
  PCI: mediatek: Add loadable kernel module support
  PCI: mediatek: Add system PM support for MT2712 and MT7622
  PCI: mediatek: Fixup MSI enablement logic by enabling MSI before clocks
  PCI: mediatek: Convert to use pci_host_probe()
  PCI: mediatek: Remove the redundant dev-&gt;pm_domain check
  PCI: mediatek: Fix class type for MT7622 to PCI_CLASS_BRIDGE_PCI
  PCI: mediatek: Fix mtk_pcie_find_port() endpoint/port matching logic
  PCI: mediatek: Fix unchecked return value
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  - Fix Mediatek unchecked return value from devm_pci_remap_iospace()
    (Gustavo A. R. Silva)

  - Fix Mediatek endpoint/port matching logic (Honghui Zhang)

  - Change Mediatek Root Port Class Code to PCI_CLASS_BRIDGE_PCI (Honghui
    Zhang)

  - Remove redundant Mediatek PM domain check (Honghui Zhang)

  - Convert Mediatek to pci_host_probe() (Honghui Zhang)

  - Fix Mediatek MSI enablement (Honghui Zhang)

  - Add Mediatek system PM support for MT2712 and MT7622 (Honghui Zhang)

  - Add Mediatek loadable module support (Honghui Zhang)

* remotes/lorenzo/pci/mediatek:
  PCI: mediatek: Add loadable kernel module support
  PCI: mediatek: Add system PM support for MT2712 and MT7622
  PCI: mediatek: Fixup MSI enablement logic by enabling MSI before clocks
  PCI: mediatek: Convert to use pci_host_probe()
  PCI: mediatek: Remove the redundant dev-&gt;pm_domain check
  PCI: mediatek: Fix class type for MT7622 to PCI_CLASS_BRIDGE_PCI
  PCI: mediatek: Fix mtk_pcie_find_port() endpoint/port matching logic
  PCI: mediatek: Fix unchecked return value
</pre>
</div>
</content>
</entry>
</feed>
