<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/pci/controller/cadence, branch v6.16</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge branch 'pci/controller/dw-rockchip'</title>
<updated>2025-06-04T15:50:38+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-06-04T15:50:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=20279628bb5e96852d417a18e9d85b9bc506e716'/>
<id>20279628bb5e96852d417a18e9d85b9bc506e716</id>
<content type='text'>
- Check only PCIE_LINKUP, not LTSSM status, to determine whether the link
  is up (Shawn Lin)

- Increase N_FTS (used in L0s-&gt;L0 transitions) and enable ASPM L0s for Root
  Complex and Endpoint modes (Shawn Lin)

- Hide the broken ATS Capability in rockchip_pcie_ep_init() instead of
  rockchip_pcie_ep_pre_init() so it stays hidden after PERST# resets
  non-sticky registers (Shawn Lin)

- Remove unused PCIE_CLIENT_GENERAL_DEBUG definition (Hans Zhang)

- Organize register and bitfield definitions logically (Hans Zhang)

- Use rockchip_pcie_link_up() to check link up instead of open coding, and
  use GENMASK() and FIELD_GET() when possible (Hans Zhang)

- Call phy_power_off() before phy_exit() in rockchip_pcie_phy_deinit()
  (Diederik de Haas)

- Return bool (not int) for link-up check in dw_pcie_ops.link_up() and
  armada8k, dra7xx, dw-rockchip, exynos, histb, keembay, keystone, kirin,
  meson, qcom, qcom-ep, rcar_gen4, spear13xx, tegra194, uniphier, visconti
  (Hans Zhang)

- Return bool (not int) for link-up check in mobiveil_pab_ops.link_up() and
  layerscape-gen4, mobiveil (Hans Zhang)

- Simplify j721e link-up check (Hans Zhang)

- Convert pci-host-common to a library so platforms that don't need native
  host controller drivers don't need to include these helper functions
  (Manivannan Sadhasivam)

* pci/controller/dw-rockchip:
  PCI: qcom: Replace PERST# sleep time with proper macro
  PCI: dw-rockchip: Replace PERST# sleep time with proper macro
  PCI: host-common: Convert to library for host controller drivers
  PCI: cadence: Simplify J721e link status check
  PCI: mobiveil: Return bool from link up check
  PCI: dwc: Return bool from link up check
  PCI: dw-rockchip: Fix PHY function call sequence in rockchip_pcie_phy_deinit()
  PCI: dw-rockchip: Use rockchip_pcie_link_up() to check link up instead of open coding
  PCI: dw-rockchip: Reorganize register and bitfield definitions
  PCI: dw-rockchip: Remove unused PCIE_CLIENT_GENERAL_DEBUG definition
  PCI: dw-rockchip: Move rockchip_pcie_ep_hide_broken_ats_cap_rk3588() to dw_pcie_ep_ops::init()
  PCI: dw-rockchip: Enable ASPM L0s capability for both RC and EP modes
  PCI: dw-rockchip: Remove PCIE_L0S_ENTRY check from rockchip_pcie_link_up()

# Conflicts:
#	drivers/pci/controller/pcie-apple.c
#	include/linux/pci-ecam.h
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Check only PCIE_LINKUP, not LTSSM status, to determine whether the link
  is up (Shawn Lin)

- Increase N_FTS (used in L0s-&gt;L0 transitions) and enable ASPM L0s for Root
  Complex and Endpoint modes (Shawn Lin)

- Hide the broken ATS Capability in rockchip_pcie_ep_init() instead of
  rockchip_pcie_ep_pre_init() so it stays hidden after PERST# resets
  non-sticky registers (Shawn Lin)

- Remove unused PCIE_CLIENT_GENERAL_DEBUG definition (Hans Zhang)

- Organize register and bitfield definitions logically (Hans Zhang)

- Use rockchip_pcie_link_up() to check link up instead of open coding, and
  use GENMASK() and FIELD_GET() when possible (Hans Zhang)

- Call phy_power_off() before phy_exit() in rockchip_pcie_phy_deinit()
  (Diederik de Haas)

- Return bool (not int) for link-up check in dw_pcie_ops.link_up() and
  armada8k, dra7xx, dw-rockchip, exynos, histb, keembay, keystone, kirin,
  meson, qcom, qcom-ep, rcar_gen4, spear13xx, tegra194, uniphier, visconti
  (Hans Zhang)

- Return bool (not int) for link-up check in mobiveil_pab_ops.link_up() and
  layerscape-gen4, mobiveil (Hans Zhang)

- Simplify j721e link-up check (Hans Zhang)

- Convert pci-host-common to a library so platforms that don't need native
  host controller drivers don't need to include these helper functions
  (Manivannan Sadhasivam)

* pci/controller/dw-rockchip:
  PCI: qcom: Replace PERST# sleep time with proper macro
  PCI: dw-rockchip: Replace PERST# sleep time with proper macro
  PCI: host-common: Convert to library for host controller drivers
  PCI: cadence: Simplify J721e link status check
  PCI: mobiveil: Return bool from link up check
  PCI: dwc: Return bool from link up check
  PCI: dw-rockchip: Fix PHY function call sequence in rockchip_pcie_phy_deinit()
  PCI: dw-rockchip: Use rockchip_pcie_link_up() to check link up instead of open coding
  PCI: dw-rockchip: Reorganize register and bitfield definitions
  PCI: dw-rockchip: Remove unused PCIE_CLIENT_GENERAL_DEBUG definition
  PCI: dw-rockchip: Move rockchip_pcie_ep_hide_broken_ats_cap_rk3588() to dw_pcie_ep_ops::init()
  PCI: dw-rockchip: Enable ASPM L0s capability for both RC and EP modes
  PCI: dw-rockchip: Remove PCIE_L0S_ENTRY check from rockchip_pcie_link_up()

# Conflicts:
#	drivers/pci/controller/pcie-apple.c
#	include/linux/pci-ecam.h
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/cadence'</title>
<updated>2025-06-04T15:50:04+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-06-04T15:50:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3f0b36295ea32ec115a54810f078a4cc7aaffa50'/>
<id>3f0b36295ea32ec115a54810f078a4cc7aaffa50</id>
<content type='text'>
- Drop a runtime PM 'put' to resolve a runtime atomic count underflow (Hans
  Zhang)

- Use shared PCIE_MSG_CODE_* definitions and remove duplicate
  cdns_pcie_msg_code definitions (Hans Zhang)

- Make the cadence core buildable as a module (Kishon Vijay Abraham I)

- Add cdns_pcie_host_disable() and cdns_pcie_ep_disable() for use by
  loadable drivers when they are removed (Siddharth Vadapalli)

- Make j721e buildable as a loadable and removable module (Siddharth
  Vadapalli)

- Fix j721e host/endpoint dependencies that result in link failures in
  some configs (Arnd Bergmann)

* pci/controller/cadence:
  PCI: j721e: Fix host/endpoint dependencies
  PCI: j721e: Add support to build as a loadable module
  PCI: cadence-ep: Introduce cdns_pcie_ep_disable() helper for cleanup
  PCI: cadence-host: Introduce cdns_pcie_host_disable() helper for cleanup
  PCI: cadence: Add support to build pcie-cadence library as a kernel module
  PCI: cadence: Remove duplicate message code definitions
  PCI: cadence: Fix runtime atomic count underflow
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Drop a runtime PM 'put' to resolve a runtime atomic count underflow (Hans
  Zhang)

- Use shared PCIE_MSG_CODE_* definitions and remove duplicate
  cdns_pcie_msg_code definitions (Hans Zhang)

- Make the cadence core buildable as a module (Kishon Vijay Abraham I)

- Add cdns_pcie_host_disable() and cdns_pcie_ep_disable() for use by
  loadable drivers when they are removed (Siddharth Vadapalli)

- Make j721e buildable as a loadable and removable module (Siddharth
  Vadapalli)

- Fix j721e host/endpoint dependencies that result in link failures in
  some configs (Arnd Bergmann)

* pci/controller/cadence:
  PCI: j721e: Fix host/endpoint dependencies
  PCI: j721e: Add support to build as a loadable module
  PCI: cadence-ep: Introduce cdns_pcie_ep_disable() helper for cleanup
  PCI: cadence-host: Introduce cdns_pcie_host_disable() helper for cleanup
  PCI: cadence: Add support to build pcie-cadence library as a kernel module
  PCI: cadence: Remove duplicate message code definitions
  PCI: cadence: Fix runtime atomic count underflow
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: j721e: Fix host/endpoint dependencies</title>
<updated>2025-06-02T21:02:37+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2025-04-23T16:25:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3c05e88413f7b7145795dc1ad56983e75bca07a7'/>
<id>3c05e88413f7b7145795dc1ad56983e75bca07a7</id>
<content type='text'>
The j721e driver has a single platform driver that can be built-in or a
loadable module, but it calls two separate backend drivers depending on
whether it is a host or endpoint.

If the two modes are not the same, we can end up with a situation where the
built-in pci-j721e driver tries to call the modular host or endpoint
driver, which causes a link failure:

  ld.lld-21: error: undefined symbol: cdns_pcie_ep_setup
  &gt;&gt;&gt; referenced by pci-j721e.c
  &gt;&gt;&gt;               drivers/pci/controller/cadence/pci-j721e.o:(j721e_pcie_probe) in archive vmlinux.a

  ld.lld-21: error: undefined symbol: cdns_pcie_host_setup
  &gt;&gt;&gt; referenced by pci-j721e.c
  &gt;&gt;&gt;               drivers/pci/controller/cadence/pci-j721e.o:(j721e_pcie_probe) in archive vmlinux.a

Rework the dependencies so that the 'select' is done by the common Kconfig
symbol, based on which of the two are enabled. Effectively this means that
having one built-in makes the other either built-in or disabled, but all
configurations will now build.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Link: https://patch.msgid.link/20250423162523.2060405-1-arnd@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The j721e driver has a single platform driver that can be built-in or a
loadable module, but it calls two separate backend drivers depending on
whether it is a host or endpoint.

If the two modes are not the same, we can end up with a situation where the
built-in pci-j721e driver tries to call the modular host or endpoint
driver, which causes a link failure:

  ld.lld-21: error: undefined symbol: cdns_pcie_ep_setup
  &gt;&gt;&gt; referenced by pci-j721e.c
  &gt;&gt;&gt;               drivers/pci/controller/cadence/pci-j721e.o:(j721e_pcie_probe) in archive vmlinux.a

  ld.lld-21: error: undefined symbol: cdns_pcie_host_setup
  &gt;&gt;&gt; referenced by pci-j721e.c
  &gt;&gt;&gt;               drivers/pci/controller/cadence/pci-j721e.o:(j721e_pcie_probe) in archive vmlinux.a

Rework the dependencies so that the 'select' is done by the common Kconfig
symbol, based on which of the two are enabled. Effectively this means that
having one built-in makes the other either built-in or disabled, but all
configurations will now build.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Link: https://patch.msgid.link/20250423162523.2060405-1-arnd@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: j721e: Add support to build as a loadable module</title>
<updated>2025-06-02T21:02:37+00:00</updated>
<author>
<name>Siddharth Vadapalli</name>
<email>s-vadapalli@ti.com</email>
</author>
<published>2025-04-17T12:44:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a2790bf81f0f7b0fb683204cd3bef07feecb9958'/>
<id>a2790bf81f0f7b0fb683204cd3bef07feecb9958</id>
<content type='text'>
The 'pci-j721e.c' driver is the application/glue/wrapper driver for the
Cadence PCIe Controllers on TI SoCs. Implement support for building it as a
loadable module.

Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://patch.msgid.link/20250417124408.2752248-5-s-vadapalli@ti.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The 'pci-j721e.c' driver is the application/glue/wrapper driver for the
Cadence PCIe Controllers on TI SoCs. Implement support for building it as a
loadable module.

Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://patch.msgid.link/20250417124408.2752248-5-s-vadapalli@ti.com
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: cadence-ep: Introduce cdns_pcie_ep_disable() helper for cleanup</title>
<updated>2025-06-02T21:02:37+00:00</updated>
<author>
<name>Siddharth Vadapalli</name>
<email>s-vadapalli@ti.com</email>
</author>
<published>2025-04-17T12:44:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3a4b05c9bae485d230560278a659e0830f96e28f'/>
<id>3a4b05c9bae485d230560278a659e0830f96e28f</id>
<content type='text'>
Introduce the helper function cdns_pcie_ep_disable() which will undo the
configuration performed by cdns_pcie_ep_setup(). Also, export it for use
by the existing callers of cdns_pcie_ep_setup(), thereby allowing them
to cleanup on their exit path.

Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://patch.msgid.link/20250417124408.2752248-4-s-vadapalli@ti.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Introduce the helper function cdns_pcie_ep_disable() which will undo the
configuration performed by cdns_pcie_ep_setup(). Also, export it for use
by the existing callers of cdns_pcie_ep_setup(), thereby allowing them
to cleanup on their exit path.

Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://patch.msgid.link/20250417124408.2752248-4-s-vadapalli@ti.com
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: cadence-host: Introduce cdns_pcie_host_disable() helper for cleanup</title>
<updated>2025-06-02T21:02:37+00:00</updated>
<author>
<name>Siddharth Vadapalli</name>
<email>s-vadapalli@ti.com</email>
</author>
<published>2025-04-17T12:44:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=47f25da6c5ea55494f4de5ca1ecf6c456b4b3e2a'/>
<id>47f25da6c5ea55494f4de5ca1ecf6c456b4b3e2a</id>
<content type='text'>
Introduce the helper function cdns_pcie_host_disable() which will undo
the configuration performed by cdns_pcie_host_setup(). Also, export it
for use by existing callers of cdns_pcie_host_setup(), thereby allowing
them to cleanup on their exit path.

Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://patch.msgid.link/20250417124408.2752248-3-s-vadapalli@ti.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Introduce the helper function cdns_pcie_host_disable() which will undo
the configuration performed by cdns_pcie_host_setup(). Also, export it
for use by existing callers of cdns_pcie_host_setup(), thereby allowing
them to cleanup on their exit path.

Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://patch.msgid.link/20250417124408.2752248-3-s-vadapalli@ti.com
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: cadence: Add support to build pcie-cadence library as a kernel module</title>
<updated>2025-06-02T21:02:33+00:00</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2025-04-17T12:44:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f876904e44360449e64e2d38c428eba3a03d7a47'/>
<id>f876904e44360449e64e2d38c428eba3a03d7a47</id>
<content type='text'>
Currently, the Cadence PCIe controller driver can be built as a built-in
module only. Since PCIe functionality is not a necessity for booting, add
support to build the Cadence PCIe driver as a loadable module as well.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://patch.msgid.link/20250417124408.2752248-2-s-vadapalli@ti.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently, the Cadence PCIe controller driver can be built as a built-in
module only. Since PCIe functionality is not a necessity for booting, add
support to build the Cadence PCIe driver as a loadable module as well.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://patch.msgid.link/20250417124408.2752248-2-s-vadapalli@ti.com
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: cadence: Remove duplicate message code definitions</title>
<updated>2025-05-28T21:55:27+00:00</updated>
<author>
<name>Hans Zhang</name>
<email>18255117159@163.com</email>
</author>
<published>2025-04-01T14:50:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=16b2da850f6f79bf9013516ce78b27a8abb10359'/>
<id>16b2da850f6f79bf9013516ce78b27a8abb10359</id>
<content type='text'>
The Cadence PCIe controller driver defines message codes in enum
cdns_pcie_msg_code duplicating the existing PCIE_MSG_CODE_* definitions in
drivers/pci/pci.h. The driver only uses ASSERT_INTA and DEASSERT_INTA codes
from this enum.

Remove the redundant Cadence-specific enum definitions and use the ones
available in drivers/pci/pci.h. This helps in avoiding code duplication,
maintaining consistency with the spec, and simplifying the code
maintenance.

Signed-off-by: Hans Zhang &lt;18255117159@163.com&gt;
[mani: commit message rewording]
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Link: https://patch.msgid.link/20250401145023.22948-1-18255117159@163.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Cadence PCIe controller driver defines message codes in enum
cdns_pcie_msg_code duplicating the existing PCIE_MSG_CODE_* definitions in
drivers/pci/pci.h. The driver only uses ASSERT_INTA and DEASSERT_INTA codes
from this enum.

Remove the redundant Cadence-specific enum definitions and use the ones
available in drivers/pci/pci.h. This helps in avoiding code duplication,
maintaining consistency with the spec, and simplifying the code
maintenance.

Signed-off-by: Hans Zhang &lt;18255117159@163.com&gt;
[mani: commit message rewording]
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Link: https://patch.msgid.link/20250401145023.22948-1-18255117159@163.com
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: endpoint: Align pci_epc_set_msix(), pci_epc_ops::set_msix() nr_irqs encoding</title>
<updated>2025-05-28T21:47:56+00:00</updated>
<author>
<name>Niklas Cassel</name>
<email>cassel@kernel.org</email>
</author>
<published>2025-05-14T07:43:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=de0321bcc5fdd83631f0c2a6fdebfe0ad4e23449'/>
<id>de0321bcc5fdd83631f0c2a6fdebfe0ad4e23449</id>
<content type='text'>
The kdoc for pci_epc_set_msix() says:
"Invoke to set the required number of MSI-X interrupts."

The kdoc for the callback pci_epc_ops-&gt;set_msix() says:
"ops to set the requested number of MSI-X interrupts in the MSI-X
capability register"

pci_epc_ops::set_msix() does however expect the parameter 'interrupts' to
be in the encoding as defined by the Table Size field. Nowhere in the
kdoc does it say that the number of interrupts should be in Table Size
encoding.

It is very confusing that the API pci_epc_set_msix() and the callback
function pci_epc_ops::set_msix() both take a parameter named 'interrupts',
but they expect completely different encodings.

Clean up the API and the callback function to have the same semantics,
i.e. the parameter represents the number of interrupts, regardless of the
internal encoding of that value.

Also rename the parameter 'interrupts' to 'nr_irqs', in both the wrapper
function and the callback function, such that the name is unambiguous.

[bhelgaas: more specific subject]

Signed-off-by: Niklas Cassel &lt;cassel@kernel.org&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: stable+noautosel@kernel.org # this is simply a cleanup
Link: https://patch.msgid.link/20250514074313.283156-14-cassel@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The kdoc for pci_epc_set_msix() says:
"Invoke to set the required number of MSI-X interrupts."

The kdoc for the callback pci_epc_ops-&gt;set_msix() says:
"ops to set the requested number of MSI-X interrupts in the MSI-X
capability register"

pci_epc_ops::set_msix() does however expect the parameter 'interrupts' to
be in the encoding as defined by the Table Size field. Nowhere in the
kdoc does it say that the number of interrupts should be in Table Size
encoding.

It is very confusing that the API pci_epc_set_msix() and the callback
function pci_epc_ops::set_msix() both take a parameter named 'interrupts',
but they expect completely different encodings.

Clean up the API and the callback function to have the same semantics,
i.e. the parameter represents the number of interrupts, regardless of the
internal encoding of that value.

Also rename the parameter 'interrupts' to 'nr_irqs', in both the wrapper
function and the callback function, such that the name is unambiguous.

[bhelgaas: more specific subject]

Signed-off-by: Niklas Cassel &lt;cassel@kernel.org&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: stable+noautosel@kernel.org # this is simply a cleanup
Link: https://patch.msgid.link/20250514074313.283156-14-cassel@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: endpoint: Align pci_epc_set_msi(), pci_epc_ops::set_msi() nr_irqs encoding</title>
<updated>2025-05-28T21:47:56+00:00</updated>
<author>
<name>Niklas Cassel</name>
<email>cassel@kernel.org</email>
</author>
<published>2025-05-14T07:43:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f62da6e7270c2db5aef8a8b14f465896961a9372'/>
<id>f62da6e7270c2db5aef8a8b14f465896961a9372</id>
<content type='text'>
The kdoc for pci_epc_set_msi() says:
"Invoke to set the required number of MSI interrupts."

The kdoc for the callback pci_epc_ops::set_msi() says:
"ops to set the requested number of MSI interrupts in the MSI capability
register"

pci_epc_ops::set_msi() does however expect the parameter 'interrupts' to be
in the encoding as defined by the Multiple Message Capable (MMC) field of
the MSI capability structure. Nowhere in the kdoc does it say that the
number of interrupts should be in MMC encoding.

It is very confusing that the API pci_epc_set_msi() and the callback
function pci_epc_ops::set_msi() both take a parameter named 'interrupts',
but they expect completely different encodings.

Clean up the API and the callback function to have the same semantics,
i.e. the parameter represents the number of interrupts, regardless of the
internal encoding of that value.

Also rename the parameter 'interrupts' to 'nr_irqs', in both the wrapper
function and the callback function, such that the name is unambiguous.

[bhelgaas: more specific subject]

Signed-off-by: Niklas Cassel &lt;cassel@kernel.org&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: stable+noautosel@kernel.org # this is simply a cleanup
Link: https://patch.msgid.link/20250514074313.283156-13-cassel@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The kdoc for pci_epc_set_msi() says:
"Invoke to set the required number of MSI interrupts."

The kdoc for the callback pci_epc_ops::set_msi() says:
"ops to set the requested number of MSI interrupts in the MSI capability
register"

pci_epc_ops::set_msi() does however expect the parameter 'interrupts' to be
in the encoding as defined by the Multiple Message Capable (MMC) field of
the MSI capability structure. Nowhere in the kdoc does it say that the
number of interrupts should be in MMC encoding.

It is very confusing that the API pci_epc_set_msi() and the callback
function pci_epc_ops::set_msi() both take a parameter named 'interrupts',
but they expect completely different encodings.

Clean up the API and the callback function to have the same semantics,
i.e. the parameter represents the number of interrupts, regardless of the
internal encoding of that value.

Also rename the parameter 'interrupts' to 'nr_irqs', in both the wrapper
function and the callback function, such that the name is unambiguous.

[bhelgaas: more specific subject]

Signed-off-by: Niklas Cassel &lt;cassel@kernel.org&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: stable+noautosel@kernel.org # this is simply a cleanup
Link: https://patch.msgid.link/20250514074313.283156-13-cassel@kernel.org
</pre>
</div>
</content>
</entry>
</feed>
