linux-toradex.git/drivers/pci/setup-bus.c, branch v3.4.2

Merge branch 'pci-next+probe_only+bus2res-fb127cb' of git://github.com/bjorn-helgaas/linux into linux-next

2012-02-24T22:25:33+00:00

PCI: add a PCI resource reallocation config option

2012-02-24T17:38:59+00:00

Add a new config option, PCI_REALLOC_ENABLE_AUTO, which will
automatically try to re-allocate PCI resources if PCI_IOV support is
enabled and the SR-IOV resources are unassigned.  Behavior can still be
controlled using the pci=realloc= parameter.

-v2: According to Jesse, adding one CONFIG option for distribution to
     disable it or enable it.
-v3: update Kconfig text (jbarnes)

Signed-off-by: Yinghai Lu 
Signed-off-by: Jesse Barnes

PCI: print out suggestion about using pci=realloc

2012-02-24T16:47:53+00:00

let user know they could try if pci=realloc could help.

-v2: update suggestion text.

Suggested-by: Jesse Barnes 
Signed-off-by: Yinghai Lu 
Signed-off-by: Jesse Barnes

PCI: prepare pci=realloc for multiple options

2012-02-24T16:47:42+00:00

Let the user could enable and disable with pci=realloc=on or pci=realloc=off

Also
1. move variable and functions near the place they are used.
2. change macro to function
3. change related functions and variable to static and _init
4. update parameter description accordingly.

This will let us add a config option to control default behavior, and
still allow the user to turn off automatic reallocation if it fails on
their platform until a permanent solution is found.

-v2: still honor pci=realloc, and treat it as pci=realloc=on
     also use enum instead of ...
-v3: update kernel-paramenters.txt according to Jesse.

Signed-off-by: Yinghai Lu 
Acked-by: Jesse Barnes 
Signed-off-by: Jesse Barnes

PCI: Retry on IORESOURCE_IO type allocations

2012-02-24T16:44:38+00:00

When enabling pci reallocation for a pci bridge, we clear the small size
in in bridge and re-assign with requested + optional size for first
several tries, but Ram mention could have problem with one case:
	https://bugzilla.kernel.org/show_bug.cgi?id=15960

After checking the booting log in
	https://lkml.org/lkml/2010/4/19/44
	[regression, bisected] Xonar DX invalid PCI I/O range since 977d17bb174

We should not stop too early for io ports.
	Apr 19 10:19:38 [kernel] pci 0000:04:00.0: BAR 7: can't assign io (size 0x4000)
	Apr 19 10:19:38 [kernel] pci 0000:05:01.0: BAR 8: assigned [mem 0x80400000-0x805fffff]
	Apr 19 10:19:38 [kernel] pci 0000:05:01.0: BAR 7: can't assign io (size 0x2000)
	Apr 19 10:19:38 [kernel] pci 0000:05:02.0: BAR 7: can't assign io (size 0x1000)
	Apr 19 10:19:38 [kernel] pci 0000:05:03.0: BAR 7: can't assign io (size 0x1000)
	Apr 19 10:19:38 [kernel] pci 0000:08:00.0: BAR 7: can't assign io (size 0x1000)
	Apr 19 10:19:38 [kernel] pci 0000:09:04.0: BAR 0: can't assign io (size 0x100)
and clear 00:1c.0 to retry again.

This patch removes IORESOUCE_IO checking, and tries one more time.  It
gives us a chance to get an allocation for the 00:1c.0 io port range
because the range from 0x4000 to 0x8000 will be freed and we can use it.

Signed-off-by: Yinghai Lu 
Signed-off-by: Jesse Barnes

PCI: make pci_flags non-weak

2012-02-24T03:18:59+00:00

No architecture defines its own pci_flags, so the core symbol does not
need to be weak.

Signed-off-by: Bjorn Helgaas

PCI: make pci_flags always available

2012-02-24T03:18:55+00:00

If we move resource assignment functions into the core, we'll still
need a way for architectures to prevent reassignment, e.g., the
"pci_probe_only" functionality, and we'll need a generic, always
available way the core can test for that.  The "pci_flags"
arrangement used by several architectures seems like a convenient
way to do this.

Signed-off-by: Bjorn Helgaas

PCI: Skip cardbus assigned resource reset during pci bus rescan

2012-02-23T20:00:04+00:00

Otherwise when rescan is used for cardbus, assigned resources will get
cleared.

Signed-off-by: Yinghai Lu 
Tested-by: Dominik Brodowski 
Signed-off-by: Jesse Barnes

PCI: Fix "cardbus bridge resources as optional" size handling

2012-02-23T19:59:56+00:00

We should not set the requested size to -2; that will confuse the
resource list sorting with align when SIZEALIGN is used.

Change to STARTALIGN and pass align from start;  we are safe to do that
just as we do that regular pci bridge.  In the long run, we should just
treat cardbus like a regular pci bridge.

Also fix the case when realloc_head is not passed: we should keep the
requested size.

Signed-off-by: Yinghai Lu 
Tested-by: Dominik Brodowski 
Acked-by: Ram Pai 
Signed-off-by: Jesse Barnes

PCI: Disable cardbus bridge MEM1 prefetchable bit

2012-02-23T19:59:45+00:00

Some BIOSes enable prefetch on both MEM0 and MEM1.  But the cardbus code
assumes MEM1 is non-pref...

Discussion could be found at:
	https://lkml.org/lkml/2012/1/12/1
	https://bugzilla.kernel.org/show_bug.cgi?id=41622#c23

Signed-off-by: Yinghai Lu 
Tested-by: Dominik Brodowski 
Signed-off-by: Jesse Barnes