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<title>linux-toradex.git/drivers/perf/arm_cspmu/Makefile, branch master</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>perf: arm_cspmu: ampere_cspmu: Add support for Ampere SoC PMU</title>
<updated>2023-10-10T18:10:54+00:00</updated>
<author>
<name>Ilkka Koskinen</name>
<email>ilkka@os.amperecomputing.com</email>
</author>
<published>2023-09-13T23:39:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=53a810ad3c5cde674cac71e629e6d10bfc9d838c'/>
<id>53a810ad3c5cde674cac71e629e6d10bfc9d838c</id>
<content type='text'>
Ampere SoC PMU follows CoreSight PMU architecture. It uses implementation
specific registers to filter events rather than PMEVFILTnR registers.

Signed-off-by: Ilkka Koskinen &lt;ilkka@os.amperecomputing.com&gt;
Link: https://lore.kernel.org/r/20230913233941.9814-5-ilkka@os.amperecomputing.com
[will: Include linux/io.h in ampere_cspmu.c for writel()]
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
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<pre>
Ampere SoC PMU follows CoreSight PMU architecture. It uses implementation
specific registers to filter events rather than PMEVFILTnR registers.

Signed-off-by: Ilkka Koskinen &lt;ilkka@os.amperecomputing.com&gt;
Link: https://lore.kernel.org/r/20230913233941.9814-5-ilkka@os.amperecomputing.com
[will: Include linux/io.h in ampere_cspmu.c for writel()]
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf: arm_cspmu: Separate Arm and vendor module</title>
<updated>2023-10-05T12:58:27+00:00</updated>
<author>
<name>Besar Wicaksono</name>
<email>bwicaksono@nvidia.com</email>
</author>
<published>2023-08-21T23:16:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bfc653aa89cb05796d7b4e046600accb442c9b7a'/>
<id>bfc653aa89cb05796d7b4e046600accb442c9b7a</id>
<content type='text'>
Arm Coresight PMU driver consists of main standard code and
vendor backend code. Both are currently built as a single module.
This patch adds vendor registration API to separate the two to
keep things modular. The main driver requests each known backend
module during initialization and defer device binding process.
The backend module then registers an init callback to the main
driver and continue the device driver binding process.

Signed-off-by: Besar Wicaksono &lt;bwicaksono@nvidia.com&gt;
Reviewed-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Reviewed-and-tested-by: Ilkka Koskinen &lt;ilkka@os.amperecomputing.com&gt;
Link: https://lore.kernel.org/r/20230821231608.50911-1-bwicaksono@nvidia.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
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<pre>
Arm Coresight PMU driver consists of main standard code and
vendor backend code. Both are currently built as a single module.
This patch adds vendor registration API to separate the two to
keep things modular. The main driver requests each known backend
module during initialization and defer device binding process.
The backend module then registers an init callback to the main
driver and continue the device driver binding process.

Signed-off-by: Besar Wicaksono &lt;bwicaksono@nvidia.com&gt;
Reviewed-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Reviewed-and-tested-by: Ilkka Koskinen &lt;ilkka@os.amperecomputing.com&gt;
Link: https://lore.kernel.org/r/20230821231608.50911-1-bwicaksono@nvidia.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf: arm_cspmu: Fix module cyclic dependency</title>
<updated>2022-11-18T13:32:11+00:00</updated>
<author>
<name>Besar Wicaksono</name>
<email>bwicaksono@nvidia.com</email>
</author>
<published>2022-11-16T20:39:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a91bbd5c9984a2b15e68aad7a79c2809fbd10fbe'/>
<id>a91bbd5c9984a2b15e68aad7a79c2809fbd10fbe</id>
<content type='text'>
Build on arm64 allmodconfig failed with:
  | depmod: ERROR: Cycle detected: arm_cspmu -&gt; nvidia_cspmu -&gt; arm_cspmu
  | depmod: ERROR: Found 2 modules in dependency cycles!

The arm_cspmu.c provides standard functions to operate the PMU and the
vendor code provides vendor specific attributes. Both need to be built as
single kernel module.

Update the makefile to compile sources under arm_cspmu into one module.

Signed-off-by: Besar Wicaksono &lt;bwicaksono@nvidia.com&gt;
Reviewed-and-Tested-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20221116203952.34168-1-bwicaksono@nvidia.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Build on arm64 allmodconfig failed with:
  | depmod: ERROR: Cycle detected: arm_cspmu -&gt; nvidia_cspmu -&gt; arm_cspmu
  | depmod: ERROR: Found 2 modules in dependency cycles!

The arm_cspmu.c provides standard functions to operate the PMU and the
vendor code provides vendor specific attributes. Both need to be built as
single kernel module.

Update the makefile to compile sources under arm_cspmu into one module.

Signed-off-by: Besar Wicaksono &lt;bwicaksono@nvidia.com&gt;
Reviewed-and-Tested-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20221116203952.34168-1-bwicaksono@nvidia.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf: arm_cspmu: Add support for NVIDIA SCF and MCF attribute</title>
<updated>2022-11-15T13:48:08+00:00</updated>
<author>
<name>Besar Wicaksono</name>
<email>bwicaksono@nvidia.com</email>
</author>
<published>2022-11-11T22:23:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=84481be7167eba1957c8718c8b044a47965fdecb'/>
<id>84481be7167eba1957c8718c8b044a47965fdecb</id>
<content type='text'>
Add support for NVIDIA System Cache Fabric (SCF) and Memory Control
Fabric (MCF) PMU attributes for CoreSight PMU implementation in
NVIDIA devices.

Acked-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Besar Wicaksono &lt;bwicaksono@nvidia.com&gt;
Link: https://lore.kernel.org/r/20221111222330.48602-3-bwicaksono@nvidia.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for NVIDIA System Cache Fabric (SCF) and Memory Control
Fabric (MCF) PMU attributes for CoreSight PMU implementation in
NVIDIA devices.

Acked-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Besar Wicaksono &lt;bwicaksono@nvidia.com&gt;
Link: https://lore.kernel.org/r/20221111222330.48602-3-bwicaksono@nvidia.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf: arm_cspmu: Add support for ARM CoreSight PMU driver</title>
<updated>2022-11-15T13:48:08+00:00</updated>
<author>
<name>Besar Wicaksono</name>
<email>bwicaksono@nvidia.com</email>
</author>
<published>2022-11-11T22:23:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e37dfd65731dc4f001fa7dfa7f705e6840017d5a'/>
<id>e37dfd65731dc4f001fa7dfa7f705e6840017d5a</id>
<content type='text'>
Add support for ARM CoreSight PMU driver framework and interfaces.
The driver provides generic implementation to operate uncore PMU based
on ARM CoreSight PMU architecture. The driver also provides interface
to get vendor/implementation specific information, for example event
attributes and formating.

The specification used in this implementation can be found below:
 * ACPI Arm Performance Monitoring Unit table:
        https://developer.arm.com/documentation/den0117/latest
 * ARM Coresight PMU architecture:
        https://developer.arm.com/documentation/ihi0091/latest

Reviewed-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Besar Wicaksono &lt;bwicaksono@nvidia.com&gt;
Link: https://lore.kernel.org/r/20221111222330.48602-2-bwicaksono@nvidia.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for ARM CoreSight PMU driver framework and interfaces.
The driver provides generic implementation to operate uncore PMU based
on ARM CoreSight PMU architecture. The driver also provides interface
to get vendor/implementation specific information, for example event
attributes and formating.

The specification used in this implementation can be found below:
 * ACPI Arm Performance Monitoring Unit table:
        https://developer.arm.com/documentation/den0117/latest
 * ARM Coresight PMU architecture:
        https://developer.arm.com/documentation/ihi0091/latest

Reviewed-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Besar Wicaksono &lt;bwicaksono@nvidia.com&gt;
Link: https://lore.kernel.org/r/20221111222330.48602-2-bwicaksono@nvidia.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</pre>
</div>
</content>
</entry>
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