linux-toradex.git/drivers/phy/qualcomm/phy-qcom-edp.c, branch v6.10

phy: qcom: edp: Add v6 specific ops and X1E80100 platform support

2024-03-28T19:12:54+00:00

Add v6 HW support by implementing the version ops. Add the X1E80100
compatible and match config as it is v6.

Signed-off-by: Abel Vesa 
Reviewed-by: Dmitry Baryshkov 
Link: https://lore.kernel.org/r/20240221-phy-qualcomm-edp-x1e80100-v4-3-4e5018877bee@linaro.org
Signed-off-by: Vinod Koul

phy: qcom: edp: Move v4 specific settings to version ops

2024-03-28T19:12:54+00:00

In order to support different HW versions move everything specific
to v4 into so-called version ops.

Signed-off-by: Abel Vesa 
Reviewed-by: Dmitry Baryshkov 
Link: https://lore.kernel.org/r/20240221-phy-qualcomm-edp-x1e80100-v4-2-4e5018877bee@linaro.org
Signed-off-by: Vinod Koul

phy: qcom: edp: Add set_mode op for configuring eDP/DP submode

2024-03-28T19:00:16+00:00

Future platforms should not use different compatibles to differentiate
between eDP and DP mode. Instead, they should use a single compatible as
the IP block is the same. It will be the job of the controller to set the
submode of the PHY accordingly.

The existing platforms will remain with separate compatibles for each
mode.

Signed-off-by: Abel Vesa 
Link: https://lore.kernel.org/r/20240324-x1e80100-phy-edp-compatible-refactor-v5-2-a0db5f3150bc@linaro.org
Signed-off-by: Vinod Koul

phy: qcom: qmp: split DP PHY registers to separate headers

2024-01-30T17:05:38+00:00

Split the DP PHY register definitions to separate headers, removing them
from the global one.

Signed-off-by: Dmitry Baryshkov 
Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-4-a463d0b57836@linaro.org
Signed-off-by: Vinod Koul

Merge tag 'phy-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

2023-09-03T17:38:02+00:00

Pull phy updates from Vinod Koul:
 "As usual a couple of new drivers, a bunch of new device support and
  few updates to existing drivers

  New Support:
   - Starfive dphy rx, JH7110 usb and pcie support
   - Rockchip rv1126 inno-dsi phy, rk3588 usb and pcie support
   - Qualcomm sa8775p PCIe support, M31 USB PHY driver
   - Samsung Exynos850 usb support

  Updates:
   - Mediatek dsi driver clock updates
   - Qualcomm sm8150 combo phy with reworking of qmp pcie driver
   - Xilinx zynqmp runtime PM support"

* tag 'phy-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (83 commits)
  phy: exynos5-usbdrd: Add Exynos850 support
  phy: exynos5-usbdrd: Add 26MHz ref clk support
  phy: exynos5-usbdrd: Make it possible to pass custom phy ops
  dt-bindings: phy: samsung,usb3-drd-phy: Add Exynos850 support
  phy: qcom-qmp-combo: fix clock probing
  phy: qcom-qmp-pcie: support SM8150 PCIe QMP PHYs
  phy: qcom-qmp-pcie: populate offsets configuration
  phy: qcom-qmp-pcie: simplify clock handling
  phy: qcom-qmp-pcie: keep offset tables sorted
  phy: qcom-qmp-pcie: drop ln_shrd from v5_20 config
  dt-bindings: phy: qcom,qmp-pcie: describe SM8150 PCIe PHYs
  dt-bindings: phy: migrate QMP PCIe PHY bindings to qcom,sc8280xp-qmp-pcie-phy.yaml
  phy: fsl-imx8mq-usb: add dev_err_probe if getting vbus failed
  phy: qcom: Introduce M31 USB PHY driver
  dt-bindings: phy: qcom,m31: Document qcom,m31 USB phy
  phy: rockchip: inno-dsidphy: Add rv1126 support
  dt-bindings: phy: rockchip-inno-dsidphy: Document rv1126
  dt-bindings: phy: mediatek,tphy: allow simple nodename pattern
  phy: amlogic: meson-g12a-usb2: fix Wvoid-pointer-to-enum-cast warning
  phy: marvell pxa-usb: fix Wvoid-pointer-to-enum-cast warning
  ...

clk: Annotate struct clk_hw_onecell_data with __counted_by

2023-08-22T20:51:26+00:00

Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).

As found with Coccinelle[1], add __counted_by for struct clk_hw_onecell_data.
Additionally, since the element count member must be set before accessing
the annotated flexible array member, move its initialization earlier.

[1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci

Cc: Michael Turquette 
Cc: Stephen Boyd 
Cc: Joel Stanley 
Cc: Andrew Jeffery 
Cc: Taichi Sugaya 
Cc: Takao Orito 
Cc: Qin Jian 
Cc: Andrew Lunn 
Cc: Gregory Clement 
Cc: Sebastian Hesselbarth 
Cc: Andy Gross 
Cc: Bjorn Andersson 
Cc: Konrad Dybcio 
Cc: Sergio Paracuellos 
Cc: Matthias Brugger 
Cc: AngeloGioacchino Del Regno 
Cc: Maxime Ripard 
Cc: Chen-Yu Tsai 
Cc: Jernej Skrabec 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: Samuel Holland 
Cc: Vinod Koul 
Cc: Kishon Vijay Abraham I 
Cc: linux-clk@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-aspeed@lists.ozlabs.org
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-mediatek@lists.infradead.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-sunxi@lists.linux.dev
Cc: linux-phy@lists.infradead.org
Signed-off-by: Kees Cook 
Link: https://lore.kernel.org/r/20230817203019.never.795-kees@kernel.org
Reviewed-by: Gustavo A. R. Silva 
Signed-off-by: Stephen Boyd

phy: Explicitly include correct DT includes

2023-07-17T06:22:56+00:00

The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Signed-off-by: Rob Herring 
Acked-by: Marc Kleine-Budde  # for drivers/phy/phy-can-transceiver.c
Acked-by: Heiko Stuebner 
Acked-by: Sergio Paracuellos 
Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org
Signed-off-by: Vinod Koul

phy: qcom: edp: Postpone clk_set_rate until the PLL is up

2022-09-02T16:57:12+00:00

When the platform was booted with the involved clocks enabled the
clk_set_rate() of the link and pixel clocks will perculate to the
children, which will fail to update because the PHY driver has just shut
down the PLL.

Postpone the clock rate updates until the PLL is back online to avoid
reconfiguring the clocks while the PLL is not ticking.

Fixes: f199223cb490 ("phy: qcom: Introduce new eDP PHY driver")
Signed-off-by: Bjorn Andersson 
Link: https://lore.kernel.org/r/20220805154432.546740-1-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul

phy: qcom: edp: Add SC8280XP eDP and DP PHYs

2022-08-30T05:31:23+00:00

The Qualcomm SC8280XP platform has a number of eDP and DP PHY instances,
add support for these.

Signed-off-by: Bjorn Andersson 
Link: https://lore.kernel.org/r/20220810040745.3582985-6-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul

phy: qcom: edp: Introduce support for DisplayPort

2022-08-30T05:31:23+00:00

The eDP phy can be used to drive either eDP or DP output, with some
minor variations in some of the configuration and seemingly a need for
implementing swing and pre_emphasis calibration.

Introduce a config object, indicating if the phy is operating in eDP or
DP mode and swing/pre-emphasis calibration to support this.

Signed-off-by: Bjorn Andersson 
Link: https://lore.kernel.org/r/20220810040745.3582985-5-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul