<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/phy/tegra, branch master</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>phy: tegra: Add support for Tegra238 XUSB pad controller</title>
<updated>2026-10-09T08:06:50+00:00</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2026-10-07T14:44:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8f56fdf3d8cb9f1dbdc93bf9ac816698aa6f70b7'/>
<id>8f56fdf3d8cb9f1dbdc93bf9ac816698aa6f70b7</id>
<content type='text'>
Add support for the Tegra238 XUSB pad controller by populating the
Tegra238 specific SoC data for the controller. The Tegra238 has three
USB2 and USB3 ports, uses the same port ops as Tegra186 and has the
same supplies as Tegra194. Due to the dependencies the Tegra238 device
has on the Tegra186 port ops and Tegra194 supplies, drop the compile
time guards around these structures.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20261007-tegra-phy-v3-3-d501de414710@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for the Tegra238 XUSB pad controller by populating the
Tegra238 specific SoC data for the controller. The Tegra238 has three
USB2 and USB3 ports, uses the same port ops as Tegra186 and has the
same supplies as Tegra194. Due to the dependencies the Tegra238 device
has on the Tegra186 port ops and Tegra194 supplies, drop the compile
time guards around these structures.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20261007-tegra-phy-v3-3-d501de414710@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Use dev_err_probe()</title>
<updated>2026-10-09T08:06:50+00:00</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2026-10-07T14:44:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c0c4091bbaa3c6dc05ecf8a639cec25eca933bfe'/>
<id>c0c4091bbaa3c6dc05ecf8a639cec25eca933bfe</id>
<content type='text'>
Use the function dev_err_probe() instead of open coding the same logic.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20261007-tegra-phy-v3-2-d501de414710@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use the function dev_err_probe() instead of open coding the same logic.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20261007-tegra-phy-v3-2-d501de414710@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: tegra: Add Tegra264 MPHY driver</title>
<updated>2026-10-05T09:47:54+00:00</updated>
<author>
<name>Kartik Rajput</name>
<email>kkartik@nvidia.com</email>
</author>
<published>2026-09-09T09:43:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=256cb243f4c21b5ba845885df9d1e79ce29eb706'/>
<id>256cb243f4c21b5ba845885df9d1e79ce29eb706</id>
<content type='text'>
Add a driver for the MIPI M-PHY found on NVIDIA Tegra264 SoCs. The
M-PHY has two lanes, each with a transmit and a receive direction,
exposed as four PHYs to the UFS host controller.

Co-developed-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Kartik Rajput &lt;kkartik@nvidia.com&gt;
Link: https://patch.msgid.link/20260909-tegra264-mphy-v1-2-ce61a80dc065@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a driver for the MIPI M-PHY found on NVIDIA Tegra264 SoCs. The
M-PHY has two lanes, each with a transmit and a receive direction,
exposed as four PHYs to the UFS host controller.

Co-developed-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Kartik Rajput &lt;kkartik@nvidia.com&gt;
Link: https://patch.msgid.link/20260909-tegra264-mphy-v1-2-ce61a80dc065@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Add Tegra264 support</title>
<updated>2026-10-03T20:42:57+00:00</updated>
<author>
<name>Wayne Chang</name>
<email>waynec@nvidia.com</email>
</author>
<published>2026-09-03T07:19:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=46fc5849823a67a4b480dec59266969a1b7f8a42'/>
<id>46fc5849823a67a4b480dec59266969a1b7f8a42</id>
<content type='text'>
Add support for the XUSB pad controller for Tegra264. Most of
the Tegra264 XUSB PADCTL registers definition and programming sequence
are the same as Tegra234, Tegra264 XUSB PADCTL can share the same
driver with Tegra186, Tegra194, and Tegra234 XUSB PADCTL.

Signed-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Tested-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Link: https://patch.msgid.link/20260903071937.533646-5-waynec@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for the XUSB pad controller for Tegra264. Most of
the Tegra264 XUSB PADCTL registers definition and programming sequence
are the same as Tegra234, Tegra264 XUSB PADCTL can share the same
driver with Tegra186, Tegra194, and Tegra234 XUSB PADCTL.

Signed-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Tested-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Link: https://patch.msgid.link/20260903071937.533646-5-waynec@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Increase timeout for USB2_TRK_COMPLETED polling</title>
<updated>2026-10-03T20:42:57+00:00</updated>
<author>
<name>Wayne Chang</name>
<email>waynec@nvidia.com</email>
</author>
<published>2026-09-03T07:19:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=475df243ffcad579c9beb6fbd47b1f9ee1045b7c'/>
<id>475df243ffcad579c9beb6fbd47b1f9ee1045b7c</id>
<content type='text'>
On Tegra264, the UTMI bias tracking circuit runs at 1 MHz and needs
more cycles for the biases to settle than on earlier SoCs such as
Tegra234. The existing timeout is therefore not long enough and can
cause spurious polling failures during bias pad power-on. Therefore,
increase the timeout to 200 cycles to support Tegra264 devices

Signed-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Tested-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Link: https://patch.msgid.link/20260903071937.533646-4-waynec@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On Tegra264, the UTMI bias tracking circuit runs at 1 MHz and needs
more cycles for the biases to settle than on earlier SoCs such as
Tegra234. The existing timeout is therefore not long enough and can
cause spurious polling failures during bias pad power-on. Therefore,
increase the timeout to 200 cycles to support Tegra264 devices

Signed-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Tested-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Link: https://patch.msgid.link/20260903071937.533646-4-waynec@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Use devm_clk_get_optional to fetch USB2 tracking clock</title>
<updated>2026-10-03T20:42:57+00:00</updated>
<author>
<name>Sing-Han Chen</name>
<email>singhanc@nvidia.com</email>
</author>
<published>2026-09-03T07:19:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9358936fa13a8d7d9fbe92762ab38271c8dcb7c0'/>
<id>9358936fa13a8d7d9fbe92762ab38271c8dcb7c0</id>
<content type='text'>
The USB2 PAD tracking clock is an optional clock so use
devm_clk_get_optional() so a missing clock in devicetree is
represented as NULL and probe can continue. clk_prepare_enable()
and clk_disable_unprepare() already treat a NULL clock as a no-op.

Signed-off-by: Sing-Han Chen &lt;singhanc@nvidia.com&gt;
Signed-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Tested-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Link: https://patch.msgid.link/20260903071937.533646-3-waynec@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The USB2 PAD tracking clock is an optional clock so use
devm_clk_get_optional() so a missing clock in devicetree is
represented as NULL and probe can continue. clk_prepare_enable()
and clk_disable_unprepare() already treat a NULL clock as a no-op.

Signed-off-by: Sing-Han Chen &lt;singhanc@nvidia.com&gt;
Signed-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Tested-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Link: https://patch.msgid.link/20260903071937.533646-3-waynec@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'phy-for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy</title>
<updated>2026-06-23T22:41:48+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-06-23T22:41:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=62cf248de32f061d99cf7cd1675419d739031c5e'/>
<id>62cf248de32f061d99cf7cd1675419d739031c5e</id>
<content type='text'>
Pull phy updates from Vinod Koul:
 "Bunch of new driver, device support in existing drivers/binding and
  few updates to existing drivers

  New Support:
   - Qualcomm Eliza QMP PHY, Eliza Synopsys eUSB2 support, Eliza PCIe
     phy support, Nord QMP UFS PHY, IPQ5210 USB3 PHY support
   - Econet EN751221 and EN7528 PCIe phy support
   - NXPs TJA1145 CAN transceiver phy support
   - TI DS125DF111 retimer phy support
   - Rockchip RK3528 usb phy support
   - TI J722S phy support
   - Axiado eMMC PHY driver
   - EyeQ5 Ethernet PHY driver
   - Generic PHY driver for Lynx 10G SerDes
   - Spacemit K3 USB2 PHY support

  Updates:
   - Tomi helping maintian zynqmp phys
   - lynx phy updates to support 25GBASER
   - Rockchip GRF for RK3568/RV1108 support
   - Qualcomm QSERDES COM v2 support"

* tag 'phy-for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (87 commits)
  phy: rockchip: inno-usb2: Add missing clkout_ctl_phy kerneldoc
  phy: Move MODULE_DEVICE_TABLE next to the table itself
  phy: add basic support for NXPs TJA1145 CAN transceiver
  dt-bindings: phy: add support for NXPs TJA1145 CAN transceiver
  phy: freescale: phy-fsl-imx8qm-lvds-phy: Fix missing pm_runtime_disable() on probe error path
  dt-bindings: phy: qcom,qmp-usb: Add ipq5210 USB3 PHY
  dt-bindings: phy: qcom,qusb2: Document IPQ5210 compatible
  phy: freescale: phy-fsl-imx8qm-lvds-phy: Use synchronous PM runtime put in reset
  MAINTAINERS: expand Lynx 28G entry to cover Lynx 10G SerDes
  phy: lynx-10g: new driver
  dt-bindings: phy: lynx-10g: initial document
  phy: lynx-28g: improve phy_validate() procedure
  phy: lynx-28g: optimize read-modify-write operation
  phy: lynx-28g: add support for big endian register maps
  phy: lynx-28g: common probe() and remove()
  phy: lynx-28g: make lynx_28g_pll_read_configuration() callable per PLL
  phy: lynx-28g: move struct lynx_info definitions downwards
  phy: lynx-28g: provide default lynx_lane_supports_mode() implementation
  phy: lynx-28g: generalize protocol converter accessors
  phy: lynx-28g: common lynx_pll_get()
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull phy updates from Vinod Koul:
 "Bunch of new driver, device support in existing drivers/binding and
  few updates to existing drivers

  New Support:
   - Qualcomm Eliza QMP PHY, Eliza Synopsys eUSB2 support, Eliza PCIe
     phy support, Nord QMP UFS PHY, IPQ5210 USB3 PHY support
   - Econet EN751221 and EN7528 PCIe phy support
   - NXPs TJA1145 CAN transceiver phy support
   - TI DS125DF111 retimer phy support
   - Rockchip RK3528 usb phy support
   - TI J722S phy support
   - Axiado eMMC PHY driver
   - EyeQ5 Ethernet PHY driver
   - Generic PHY driver for Lynx 10G SerDes
   - Spacemit K3 USB2 PHY support

  Updates:
   - Tomi helping maintian zynqmp phys
   - lynx phy updates to support 25GBASER
   - Rockchip GRF for RK3568/RV1108 support
   - Qualcomm QSERDES COM v2 support"

* tag 'phy-for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (87 commits)
  phy: rockchip: inno-usb2: Add missing clkout_ctl_phy kerneldoc
  phy: Move MODULE_DEVICE_TABLE next to the table itself
  phy: add basic support for NXPs TJA1145 CAN transceiver
  dt-bindings: phy: add support for NXPs TJA1145 CAN transceiver
  phy: freescale: phy-fsl-imx8qm-lvds-phy: Fix missing pm_runtime_disable() on probe error path
  dt-bindings: phy: qcom,qmp-usb: Add ipq5210 USB3 PHY
  dt-bindings: phy: qcom,qusb2: Document IPQ5210 compatible
  phy: freescale: phy-fsl-imx8qm-lvds-phy: Use synchronous PM runtime put in reset
  MAINTAINERS: expand Lynx 28G entry to cover Lynx 10G SerDes
  phy: lynx-10g: new driver
  dt-bindings: phy: lynx-10g: initial document
  phy: lynx-28g: improve phy_validate() procedure
  phy: lynx-28g: optimize read-modify-write operation
  phy: lynx-28g: add support for big endian register maps
  phy: lynx-28g: common probe() and remove()
  phy: lynx-28g: make lynx_28g_pll_read_configuration() callable per PLL
  phy: lynx-28g: move struct lynx_info definitions downwards
  phy: lynx-28g: provide default lynx_lane_supports_mode() implementation
  phy: lynx-28g: generalize protocol converter accessors
  phy: lynx-28g: common lynx_pll_get()
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Fix per-pad high-speed termination calibration</title>
<updated>2026-05-10T11:31:18+00:00</updated>
<author>
<name>Wayne Chang</name>
<email>waynec@nvidia.com</email>
</author>
<published>2026-05-04T03:33:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=da110228b54f2e2143d97ea7151e0dc22e539d67'/>
<id>da110228b54f2e2143d97ea7151e0dc22e539d67</id>
<content type='text'>
The existing code reads a single hs_term_range_adj value from bit field
[10:7] of FUSE_SKU_CALIB_0 and applies it to all USB2 pads uniformly.
However, on SoCs that support per-pad termination, each pad has its own
hs_term_range_adj field: pad 0 in FUSE_SKU_CALIB_0[10:7], and pads 1-3
in FUSE_USB_CALIB_EXT_0 at bit offsets [8:5], [12:9], and [16:13]
respectively.

Fix the calibration by reading per-pad values from the appropriate fuse
registers. For SoCs that do not support per-pad termination, replicate
pad 0's value to all pads to maintain existing behavior.

Add a has_per_pad_term flag to the SoC data to indicate whether per-pad
termination values are available in FUSE_USB_CALIB_EXT_0.

Fixes: 1ef535c6ba8e ("phy: tegra: xusb: Add Tegra194 support")
Cc: stable@vger.kernel.org
Signed-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;
Signed-off-by: Wei-Cheng Chen &lt;weichengc@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Tested-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Link: https://patch.msgid.link/20260504033305.2283145-1-weichengc@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The existing code reads a single hs_term_range_adj value from bit field
[10:7] of FUSE_SKU_CALIB_0 and applies it to all USB2 pads uniformly.
However, on SoCs that support per-pad termination, each pad has its own
hs_term_range_adj field: pad 0 in FUSE_SKU_CALIB_0[10:7], and pads 1-3
in FUSE_USB_CALIB_EXT_0 at bit offsets [8:5], [12:9], and [16:13]
respectively.

Fix the calibration by reading per-pad values from the appropriate fuse
registers. For SoCs that do not support per-pad termination, replicate
pad 0's value to all pads to maintain existing behavior.

Add a has_per_pad_term flag to the SoC data to indicate whether per-pad
termination values are available in FUSE_USB_CALIB_EXT_0.

Fixes: 1ef535c6ba8e ("phy: tegra: xusb: Add Tegra194 support")
Cc: stable@vger.kernel.org
Signed-off-by: Wayne Chang &lt;waynec@nvidia.com&gt;
Signed-off-by: Wei-Cheng Chen &lt;weichengc@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Tested-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Link: https://patch.msgid.link/20260504033305.2283145-1-weichengc@nvidia.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: tegra: xusb: Make USB_CONN_GPIO select conditional on GPIOLIB</title>
<updated>2026-05-10T11:13:13+00:00</updated>
<author>
<name>Sasha Levin</name>
<email>sashal@kernel.org</email>
</author>
<published>2026-04-26T00:03:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=18af47764d75bf2cd6297289255fd7f83967e7cf'/>
<id>18af47764d75bf2cd6297289255fd7f83967e7cf</id>
<content type='text'>
kconfiglint reports:

  K006: config PHY_TEGRA_XUSB selects USB_CONN_GPIO which depends on
        GPIOLIB, but PHY_TEGRA_XUSB does not depend on GPIOLIB
  K002: config PHY_TEGRA_XUSB selects visible symbol USB_CONN_GPIO
        which has dependencies

USB_CONN_GPIO was introduced in commit 4602f3bff266 ("usb: common: add USB
GPIO based connection detection driver") with a hard dependency on GPIOLIB,
since it needs GPIO pins to detect USB cable connection state.

Commit f67213cee2b3 ("phy: tegra: xusb: Add usb-role-switch support") added
`select USB_CONN_GPIO` to PHY_TEGRA_XUSB to support USB role switching via
GPIO-based detection. At that time, PHY_TEGRA_XUSB depended only on
`ARCH_TEGRA`, and both the ARM32 and ARM64 ARCH_TEGRA Kconfig definitions
select GPIOLIB, so the missing explicit GPIOLIB guard was not a functional
problem — GPIOLIB is always available when ARCH_TEGRA is enabled.

Later, commit 0d5c9bc7c680 ("phy: tegra: Select USB_COMMON for
usb_get_maximum_speed()") added `depends on USB_SUPPORT` but still did not
address the GPIOLIB gap.

The select can force USB_CONN_GPIO on without its GPIOLIB dependency being
satisfied if the Kconfig dependencies were ever restructured. Make the
select conditional with `select USB_CONN_GPIO if GPIOLIB` to make the
dependency explicit. This mirrors how other drivers handle optional
GPIO-dependent selects throughout the kernel.

Assisted-by: Claude:claude-opus-4-6 kconfiglint
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
Link: https://patch.msgid.link/20260426000309.54959-1-sashal@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
kconfiglint reports:

  K006: config PHY_TEGRA_XUSB selects USB_CONN_GPIO which depends on
        GPIOLIB, but PHY_TEGRA_XUSB does not depend on GPIOLIB
  K002: config PHY_TEGRA_XUSB selects visible symbol USB_CONN_GPIO
        which has dependencies

USB_CONN_GPIO was introduced in commit 4602f3bff266 ("usb: common: add USB
GPIO based connection detection driver") with a hard dependency on GPIOLIB,
since it needs GPIO pins to detect USB cable connection state.

Commit f67213cee2b3 ("phy: tegra: xusb: Add usb-role-switch support") added
`select USB_CONN_GPIO` to PHY_TEGRA_XUSB to support USB role switching via
GPIO-based detection. At that time, PHY_TEGRA_XUSB depended only on
`ARCH_TEGRA`, and both the ARM32 and ARM64 ARCH_TEGRA Kconfig definitions
select GPIOLIB, so the missing explicit GPIOLIB guard was not a functional
problem — GPIOLIB is always available when ARCH_TEGRA is enabled.

Later, commit 0d5c9bc7c680 ("phy: tegra: Select USB_COMMON for
usb_get_maximum_speed()") added `depends on USB_SUPPORT` but still did not
address the GPIOLIB gap.

The select can force USB_CONN_GPIO on without its GPIOLIB dependency being
satisfied if the Kconfig dependencies were ever restructured. Make the
select conditional with `select USB_CONN_GPIO if GPIOLIB` to make the
dependency explicit. This mirrors how other drivers handle optional
GPIO-dependent selects throughout the kernel.

Assisted-by: Claude:claude-opus-4-6 kconfiglint
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
Link: https://patch.msgid.link/20260426000309.54959-1-sashal@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Convert 'alloc_obj' family to use the new default GFP_KERNEL argument</title>
<updated>2026-02-22T01:09:51+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-02-22T00:37:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bf4afc53b77aeaa48b5409da5c8da6bb4eff7f43'/>
<id>bf4afc53b77aeaa48b5409da5c8da6bb4eff7f43</id>
<content type='text'>
This was done entirely with mindless brute force, using

    git grep -l '\&lt;k[vmz]*alloc_objs*(.*, GFP_KERNEL)' |
        xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/'

to convert the new alloc_obj() users that had a simple GFP_KERNEL
argument to just drop that argument.

Note that due to the extreme simplicity of the scripting, any slightly
more complex cases spread over multiple lines would not be triggered:
they definitely exist, but this covers the vast bulk of the cases, and
the resulting diff is also then easier to check automatically.

For the same reason the 'flex' versions will be done as a separate
conversion.

Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This was done entirely with mindless brute force, using

    git grep -l '\&lt;k[vmz]*alloc_objs*(.*, GFP_KERNEL)' |
        xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/'

to convert the new alloc_obj() users that had a simple GFP_KERNEL
argument to just drop that argument.

Note that due to the extreme simplicity of the scripting, any slightly
more complex cases spread over multiple lines would not be triggered:
they definitely exist, but this covers the vast bulk of the cases, and
the resulting diff is also then easier to check automatically.

For the same reason the 'flex' versions will be done as a separate
conversion.

Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
