linux-toradex.git/drivers/phy, branch v5.9-rc6 Linux kernel for Apalis and Colibri modules Merge tag 'phy-fixes-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-linus 2020-09-04T10:41:55+00:00 Greg Kroah-Hartman gregkh@linuxfoundation.org 2020-09-04T10:41:55+00:00 e22a220515e884b286e7dc0ab938b0f9e7304b5f Vinod writes: phy: fixes for 5.9 *) platform_no_drv_owner.cocci and return value check qcom ipq806x-usb driver *) correcting register programming for ipq8074 phy *) disable PHY charger detect for omap-usb2-phy * tag 'phy-fixes-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: phy: omap-usb2-phy: disable PHY charger detect phy: qcom-qmp: Use correct values for ipq8074 PCIe Gen2 PHY init phy: qualcomm: fix return value check in qcom_ipq806x_usb_phy_probe() phy: qualcomm: fix platform_no_drv_owner.cocci warnings 
Vinod writes:

phy: fixes for 5.9

*) platform_no_drv_owner.cocci and return value check qcom ipq806x-usb driver
*) correcting register programming for ipq8074 phy
*) disable PHY charger detect for omap-usb2-phy

* tag 'phy-fixes-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy:
  phy: omap-usb2-phy: disable PHY charger detect
  phy: qcom-qmp: Use correct values for ipq8074 PCIe Gen2 PHY init
  phy: qualcomm: fix return value check in qcom_ipq806x_usb_phy_probe()
  phy: qualcomm: fix platform_no_drv_owner.cocci warnings
phy: omap-usb2-phy: disable PHY charger detect 2020-08-31T09:00:59+00:00 Roger Quadros rogerq@ti.com 2020-08-24T07:51:26+00:00 ad7a7acaedcf45071c822b6c983f9c1e084041c9 AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which could cause enumeration failure with some USB hubs. Disabling the USB2_PHY Charger Detect function will put D+ into the normal state. This addresses Silicon Errata: i2075 - "USB2PHY: USB2PHY Charger Detect is Enabled by Default Without VBUS Presence" Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/20200824075127.14902-2-rogerq@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which
could cause enumeration failure with some USB hubs.  Disabling the
USB2_PHY Charger Detect function will put D+ into the normal state.

This addresses Silicon Errata:
i2075 - "USB2PHY: USB2PHY Charger Detect is Enabled by Default Without VBUS
Presence"

Signed-off-by: Roger Quadros <rogerq@ti.com>
Tested-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/20200824075127.14902-2-rogerq@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
treewide: Use fallthrough pseudo-keyword 2020-08-23T22:36:59+00:00 Gustavo A. R. Silva gustavoars@kernel.org 2020-08-23T22:36:59+00:00 df561f6688fef775baa341a0f5d960becd248b11 Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> 
Replace the existing /* fall through */ comments and its variants with
the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary
fall-through markings when it is the case.

[1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through

Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
phy: qcom-qmp: Use correct values for ipq8074 PCIe Gen2 PHY init 2020-08-23T15:50:14+00:00 Sivaprakash Murugesan sivaprak@codeaurora.org 2020-07-29T15:30:03+00:00 afd55e6d1bd35b4b36847869011447a83a81c8e0 There were some problem in ipq8074 Gen2 PCIe phy init sequence. 1. Few register values were wrongly updated in the phy init sequence. 2. The register QSERDES_RX_SIGDET_CNTRL is a RX tuning parameter register which is added in serdes table causing the wrong register was getting updated. 3. Clocks and resets were not added in the phy init. Fix these to make Gen2 PCIe port on ipq8074 devices to work. Fixes: eef243d04b2b6 ("phy: qcom-qmp: Add support for IPQ8074") Cc: stable@vger.kernel.org Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org> Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lore.kernel.org/r/1596036607-11877-4-git-send-email-sivaprak@codeaurora.org Signed-off-by: Vinod Koul <vkoul@kernel.org> 
There were some problem in ipq8074 Gen2 PCIe phy init sequence.

1. Few register values were wrongly updated in the phy init sequence.
2. The register QSERDES_RX_SIGDET_CNTRL is a RX tuning parameter
   register which is added in serdes table causing the wrong register
   was getting updated.
3. Clocks and resets were not added in the phy init.

Fix these to make Gen2 PCIe port on ipq8074 devices to work.

Fixes: eef243d04b2b6 ("phy: qcom-qmp: Add support for IPQ8074")
Cc: stable@vger.kernel.org
Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Link: https://lore.kernel.org/r/1596036607-11877-4-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: qualcomm: fix return value check in qcom_ipq806x_usb_phy_probe() 2020-08-17T04:07:12+00:00 Wei Yongjun weiyongjun1@huawei.com 2020-07-23T11:36:22+00:00 04db2304a9495b98b8976c9a8cc5f9845be35ba8 In case of error, the function devm_ioremap() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Fixes: ef19b117b834 ("phy: qualcomm: add qcom ipq806x dwc usb phy driver") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Link: https://lore.kernel.org/r/20200723113622.136752-1-weiyongjun1@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
In case of error, the function devm_ioremap() returns NULL pointer not
ERR_PTR(). The IS_ERR() test in the return value check should be
replaced with NULL test.

Fixes: ef19b117b834 ("phy: qualcomm: add qcom ipq806x dwc usb phy driver")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Link: https://lore.kernel.org/r/20200723113622.136752-1-weiyongjun1@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: qualcomm: fix platform_no_drv_owner.cocci warnings 2020-08-17T04:07:11+00:00 YueHaibing yuehaibing@huawei.com 2020-07-25T03:16:24+00:00 d86f9088938e637de5908ed463b023eee4d1b9e1 Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20200725031624.31432-1-yuehaibing@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20200725031624.31432-1-yuehaibing@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Merge tag 'phy-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next 2020-07-23T07:52:10+00:00 Greg Kroah-Hartman gregkh@linuxfoundation.org 2020-07-23T07:52:10+00:00 1859a772e2744da8d4ddb987e010541e312adf69 Vinod writes: phy for 5.9 - New PHY Drivers: - Samsung UFS - Qcom USB DWC for ipq806x - Xilinx ZynqMP Gigabit Transceiver - Qcom USB QMP for IPQ8074 - BCM63xx USBH - Removed: - Qcom ufs qmp phy driver - Updates: - Support for Qcom SM8250 QMP V4 USB3 UNIPHY - qcom-snps runtime pm support - Cleanup of W=1 warns in the subsystem * tag 'phy-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (46 commits) phy: qualcomm: fix setting of tx_deamp_3_5db when device property read fails phy: bcm63xx-usbh: Add BCM63xx USBH driver dt-bindings: phy: add bcm63xx-usbh bindings phy: armada-38x: fix NETA lockup when repeatedly switching speeds dt: update Marvell Armada 38x COMPHY binding phy: samsung-ufs: Fix IS_ERR argument dt-bindings: phy: renesas,usb3-phy: Add r8a774e1 support dt-bindings: phy: renesas,usb2-phy: Add r8a774e1 support phy: renesas: rcar-gen3-usb2: exit if request_irq() failed phy: renesas: rcar-gen3-usb2: move irq registration to init devicetree: bindings: phy: Document ipq806x dwc3 qcom phy phy: qualcomm: add qcom ipq806x dwc usb phy driver phy: samsung-ufs: add UFS PHY driver for samsung SoC dt-bindings: phy: Document Samsung UFS PHY bindings phy: sun4i-usb: explicitly include gpio/consumer.h phy: stm32: use NULL instead of zero phy: exynos5-usbdrd: use correct format for structure description phy: rockchip-typec: use correct format for structure description phy: xgene: remove unsigned integer comparison with less than zero phy: mapphone-mdm6600: Add missing description for some structure fields ... 
Vinod writes:

phy for 5.9

 - New PHY Drivers:
   - Samsung UFS
   - Qcom USB DWC for ipq806x
   - Xilinx ZynqMP Gigabit Transceiver
   - Qcom USB QMP for IPQ8074
   - BCM63xx USBH

 - Removed:
   - Qcom ufs qmp phy driver

 - Updates:
   - Support for Qcom SM8250 QMP V4 USB3 UNIPHY
   - qcom-snps runtime pm support
   - Cleanup of W=1 warns in the subsystem

* tag 'phy-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (46 commits)
  phy: qualcomm: fix setting of tx_deamp_3_5db when device property read fails
  phy: bcm63xx-usbh: Add BCM63xx USBH driver
  dt-bindings: phy: add bcm63xx-usbh bindings
  phy: armada-38x: fix NETA lockup when repeatedly switching speeds
  dt: update Marvell Armada 38x COMPHY binding
  phy: samsung-ufs: Fix IS_ERR argument
  dt-bindings: phy: renesas,usb3-phy: Add r8a774e1 support
  dt-bindings: phy: renesas,usb2-phy: Add r8a774e1 support
  phy: renesas: rcar-gen3-usb2: exit if request_irq() failed
  phy: renesas: rcar-gen3-usb2: move irq registration to init
  devicetree: bindings: phy: Document ipq806x dwc3 qcom phy
  phy: qualcomm: add qcom ipq806x dwc usb phy driver
  phy: samsung-ufs: add UFS PHY driver for samsung SoC
  dt-bindings: phy: Document Samsung UFS PHY bindings
  phy: sun4i-usb: explicitly include gpio/consumer.h
  phy: stm32: use NULL instead of zero
  phy: exynos5-usbdrd: use correct format for structure description
  phy: rockchip-typec: use correct format for structure description
  phy: xgene: remove unsigned integer comparison with less than zero
  phy: mapphone-mdm6600: Add missing description for some structure fields
  ...
phy: qualcomm: fix setting of tx_deamp_3_5db when device property read fails 2020-07-21T17:41:48+00:00 Colin Ian King colin.king@canonical.com 2020-07-21T15:06:13+00:00 3d7b0ca5300bd01b176f2b4c10e173db802560d8 Currently when reading of the device property for "qcom,tx-deamp_3_5db" fails the default is being assigned incorrectly to phy_dwc3->rx_eq. This looks like a copy-n-paste error and in fact should be assigning the default instead to phy_dwc3->tx_deamp_3_5db Addresses-Coverity: ("Copy-paste error") Fixes: ef19b117b834 ("phy: qualcomm: add qcom ipq806x dwc usb phy driver") Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20200721150613.416876-1-colin.king@canonical.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Currently when reading of the device property for "qcom,tx-deamp_3_5db"
fails the default is being assigned incorrectly to phy_dwc3->rx_eq. This
looks like a copy-n-paste error and in fact should be assigning the
default instead to phy_dwc3->tx_deamp_3_5db

Addresses-Coverity: ("Copy-paste error")
Fixes: ef19b117b834 ("phy: qualcomm: add qcom ipq806x dwc usb phy driver")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20200721150613.416876-1-colin.king@canonical.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: bcm63xx-usbh: Add BCM63xx USBH driver 2020-07-21T17:29:58+00:00 Álvaro Fernández Rojas noltari@gmail.com 2020-07-20T13:12:09+00:00 783f6d3dcf35f7b63783756710bebcecb3067f83 Add BCM63xx USBH PHY driver for BMIPS. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Simon Arlott <simon@octiron.net> Link: https://lore.kernel.org/r/20200720131209.1236590-3-noltari@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Add BCM63xx USBH PHY driver for BMIPS.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Simon Arlott <simon@octiron.net>
Link: https://lore.kernel.org/r/20200720131209.1236590-3-noltari@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: armada-38x: fix NETA lockup when repeatedly switching speeds 2020-07-21T17:27:46+00:00 Russell King rmk+kernel@armlinux.org.uk 2020-07-21T14:40:43+00:00 1dea06cd643da38931382ebdc151efced201ffad The mvneta hardware appears to lock up in various random ways when repeatedly switching speeds between 1G and 2.5G, which involves reprogramming the COMPHY. It is not entirely clear why this happens, but best guess is that reprogramming the COMPHY glitches mvneta clocks causing the hardware to fail. It seems that rebooting resolves the failure, but not down/up cycling the interface alone. Various other approaches have been tried, such as trying to cleanly power down the COMPHY and then take it back through the power up initialisation, but this does not seem to help. It was finally noticed that u-boot's last step when configuring a COMPHY for "SGMII" mode was to poke at a register described as "GBE_CONFIGURATION_REG", which is undocumented in any external documentation. All that we have is the fact that u-boot sets a bit corresponding to the "SGMII" lane at the end of COMPHY initialisation. Experimentation shows that if we clear this bit prior to changing the speed, and then set it afterwards, mvneta does not suffer this problem on the SolidRun Clearfog when switching speeds between 1G and 2.5G. This problem was found while script-testing phylink. This fix also requires the corresponding change to DT to be effective. See "ARM: dts: armada-38x: fix NETA lockup when repeatedly switching speeds". Fixes: 14dc100b4411 ("phy: armada38x: add common phy support") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/E1jxtRj-0003Tz-CG@rmk-PC.armlinux.org.uk Signed-off-by: Vinod Koul <vkoul@kernel.org> 
The mvneta hardware appears to lock up in various random ways when
repeatedly switching speeds between 1G and 2.5G, which involves
reprogramming the COMPHY.  It is not entirely clear why this happens,
but best guess is that reprogramming the COMPHY glitches mvneta clocks
causing the hardware to fail.  It seems that rebooting resolves the
failure, but not down/up cycling the interface alone.

Various other approaches have been tried, such as trying to cleanly
power down the COMPHY and then take it back through the power up
initialisation, but this does not seem to help.

It was finally noticed that u-boot's last step when configuring a
COMPHY for "SGMII" mode was to poke at a register described as
"GBE_CONFIGURATION_REG", which is undocumented in any external
documentation.  All that we have is the fact that u-boot sets a bit
corresponding to the "SGMII" lane at the end of COMPHY initialisation.

Experimentation shows that if we clear this bit prior to changing the
speed, and then set it afterwards, mvneta does not suffer this problem
on the SolidRun Clearfog when switching speeds between 1G and 2.5G.

This problem was found while script-testing phylink.

This fix also requires the corresponding change to DT to be effective.
See "ARM: dts: armada-38x: fix NETA lockup when repeatedly switching
speeds".

Fixes: 14dc100b4411 ("phy: armada38x: add common phy support")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/E1jxtRj-0003Tz-CG@rmk-PC.armlinux.org.uk
Signed-off-by: Vinod Koul <vkoul@kernel.org>