linux-toradex.git/drivers/phy, branch v6.17-rc2 Linux kernel for Apalis and Colibri modules Merge tag 'phy-for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy 2025-08-01T19:31:50+00:00 Linus Torvalds torvalds@linux-foundation.org 2025-08-01T19:31:50+00:00 8582976acc8504cec53a7b6fed493435eba8437f Pull phy updates from Vinod Koul: "New Support: - Qualcomm Milos Synopsys eUSB2 PHY, SM8750 QMP phy support, M31 eUSB2 PHY driver - Samsung Exynos990 usbdrd phy, Exynos7870 MIPI phy support - Renesas RZ/V2N usb2-phy support Updates: - Bulk Yaml binding conversion By Rob H (too many to be listed) - cadence: Sierra PCIe, USB PHY multilink configuration support - Qualcomm refactoring of UFS PHY reset and UFS driver support for phy calibrate API" * tag 'phy-for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (74 commits) phy: qcom: phy-qcom-m31: Update IPQ5332 M31 USB phy initialization sequence dt-bindings: phy: Convert brcm,sr-usb-combo-phy to DT schema dt-bindings: phy: Convert ti,da830-usb-phy to DT schema dt-bindings: phy: marvell,mmp2-usb-phy: Drop status from the example dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* properties phy: exynos-mipi-video: correct cam0 sysreg property name for exynos7870 phy: qcom: phy-qcom-snps-eusb2: Update init sequence per HPG 1.0.2 phy: qcom: phy-qcom-snps-eusb2: Add missing write from init sequence dt-bindings: phy: qcom,snps-eusb2: document the Milos Synopsys eUSB2 PHY dt-bindings: usb: qcom,snps-dwc3: Add Milos compatible phy: rockchip-pcie: Properly disable TEST_WRITE strobe signal phy: rockchip-pcie: Enable all four lanes if required dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for QCS615 phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750 phy: qcom: m31-eusb2: drop registration printk phy: qcom: m31-eusb2: fix match data santity check phy: qcom: qmp-pcie: Update PHY settings for QCS8300 & SA8775P phy: qualcomm: phy-qcom-eusb2-repeater: Don't zero-out registers dt-bindings: phy: qcom,snps-eusb2-repeater: Remove default tuning values phy: mediatek: tphy: Cleanup and document slew calibration ... 
Pull phy updates from Vinod Koul:
 "New Support:

   - Qualcomm Milos Synopsys eUSB2 PHY, SM8750 QMP phy support, M31
     eUSB2 PHY driver

   - Samsung Exynos990 usbdrd phy, Exynos7870 MIPI phy support

   - Renesas RZ/V2N usb2-phy support

  Updates:

   - Bulk Yaml binding conversion By Rob H (too many to be listed)

   - cadence: Sierra PCIe, USB PHY multilink configuration support

   - Qualcomm refactoring of UFS PHY reset and UFS driver support for
     phy calibrate API"

* tag 'phy-for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (74 commits)
  phy: qcom: phy-qcom-m31: Update IPQ5332 M31 USB phy initialization sequence
  dt-bindings: phy: Convert brcm,sr-usb-combo-phy to DT schema
  dt-bindings: phy: Convert ti,da830-usb-phy to DT schema
  dt-bindings: phy: marvell,mmp2-usb-phy: Drop status from the example
  dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* properties
  phy: exynos-mipi-video: correct cam0 sysreg property name for exynos7870
  phy: qcom: phy-qcom-snps-eusb2: Update init sequence per HPG 1.0.2
  phy: qcom: phy-qcom-snps-eusb2: Add missing write from init sequence
  dt-bindings: phy: qcom,snps-eusb2: document the Milos Synopsys eUSB2 PHY
  dt-bindings: usb: qcom,snps-dwc3: Add Milos compatible
  phy: rockchip-pcie: Properly disable TEST_WRITE strobe signal
  phy: rockchip-pcie: Enable all four lanes if required
  dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for QCS615
  phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750
  phy: qcom: m31-eusb2: drop registration printk
  phy: qcom: m31-eusb2: fix match data santity check
  phy: qcom: qmp-pcie: Update PHY settings for QCS8300 & SA8775P
  phy: qualcomm: phy-qcom-eusb2-repeater: Don't zero-out registers
  dt-bindings: phy: qcom,snps-eusb2-repeater: Remove default tuning values
  phy: mediatek: tphy: Cleanup and document slew calibration
  ...
Merge tag 'for-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply 2025-08-01T04:39:01+00:00 Linus Torvalds torvalds@linux-foundation.org 2025-08-01T04:39:01+00:00 07b43820437bd96f31f5d7f9baf4453fcb7dedbf Pull power supply and reset updates from Sebastian Reichel: "Power-supply core: - battery-info: replace any DT specific bits with fwnode usage - replace any device-tree code with generic fwnode based handling Power-supply drivers: - ug3105_battery: use battery-info API - qcom_battmgr: report capacity - qcom_battmgr: support LiPo battery reporting - add missing missing power-supply ref to a bunch of DT bindings - update drivers regarding pm_runtime_autosuspend() usage - misc minor fixes and cleanups Reset drivers: - misc minor cleanups" * tag 'for-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply: (32 commits) power: supply: core: fix static checker warning power: supply: twl4030_charger: Remove redundant pm_runtime_mark_last_busy() calls power: supply: bq24190: Remove redundant pm_runtime_mark_last_busy() calls MAINTAINERS: rectify file entry in QUALCOMM SMB CHARGER DRIVER power: supply: max1720x correct capacity computation MAINTAINERS: add myself as smbx charger driver maintainer power: supply: pmi8998_charger: rename to qcom_smbx power: supply: qcom_pmi8998_charger: fix wakeirq power: supply: max14577: Handle NULL pdata when CONFIG_OF is not set power: return the correct error code power: reset: POWER_RESET_TORADEX_EC should depend on ARCH_MXC power: supply: cpcap-charger: Fix null check for power_supply_get_by_name power: supply: bq25980_charger: Constify reg_default array power: supply: bq256xx_charger: Constify reg_default array power: reset: at91-sama5d2_shdwc: Refactor wake-up source logging to use dev_info power: reset: qcom-pon: Rename variables to use generic naming power: supply: qcom_battmgr: Add lithium-polymer entry power: supply: qcom_battmgr: Report battery capacity power: supply: bq24190: Free battery_info power: supply: ug3105_battery: Switch to power_supply_batinfo_ocv2cap() ... 
Pull power supply and reset updates from Sebastian Reichel:
 "Power-supply core:
   - battery-info: replace any DT specific bits with fwnode usage
   - replace any device-tree code with generic fwnode based handling

  Power-supply drivers:
   - ug3105_battery: use battery-info API
   - qcom_battmgr: report capacity
   - qcom_battmgr: support LiPo battery reporting
   - add missing missing power-supply ref to a bunch of DT bindings
   - update drivers regarding pm_runtime_autosuspend() usage
   - misc minor fixes and cleanups

  Reset drivers:
   - misc minor cleanups"

* tag 'for-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply: (32 commits)
  power: supply: core: fix static checker warning
  power: supply: twl4030_charger: Remove redundant pm_runtime_mark_last_busy() calls
  power: supply: bq24190: Remove redundant pm_runtime_mark_last_busy() calls
  MAINTAINERS: rectify file entry in QUALCOMM SMB CHARGER DRIVER
  power: supply: max1720x correct capacity computation
  MAINTAINERS: add myself as smbx charger driver maintainer
  power: supply: pmi8998_charger: rename to qcom_smbx
  power: supply: qcom_pmi8998_charger: fix wakeirq
  power: supply: max14577: Handle NULL pdata when CONFIG_OF is not set
  power: return the correct error code
  power: reset: POWER_RESET_TORADEX_EC should depend on ARCH_MXC
  power: supply: cpcap-charger: Fix null check for power_supply_get_by_name
  power: supply: bq25980_charger: Constify reg_default array
  power: supply: bq256xx_charger: Constify reg_default array
  power: reset: at91-sama5d2_shdwc: Refactor wake-up source logging to use dev_info
  power: reset: qcom-pon: Rename variables to use generic naming
  power: supply: qcom_battmgr: Add lithium-polymer entry
  power: supply: qcom_battmgr: Report battery capacity
  power: supply: bq24190: Free battery_info
  power: supply: ug3105_battery: Switch to power_supply_batinfo_ocv2cap()
  ...
phy: qcom: phy-qcom-m31: Update IPQ5332 M31 USB phy initialization sequence 2025-07-22T13:30:06+00:00 Kathiravan Thirumoorthy kathiravan.thirumoorthy@oss.qualcomm.com 2025-06-30T08:18:13+00:00 4a3556b81b99f0c8c0358f7cc6801a62b4538fe2 The current configuration used for the IPQ5332 M31 USB PHY fails the Near End High Speed Signal Quality compliance test. To resolve this, update the initialization sequence as specified in the Hardware Design Document. Fixes: 08e49af50701 ("phy: qcom: Introduce M31 USB PHY driver") Cc: stable@kernel.org Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250630-ipq5332_hsphy_complaince-v2-1-63621439ebdb@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
The current configuration used for the IPQ5332 M31 USB PHY fails the
Near End High Speed Signal Quality compliance test. To resolve this,
update the initialization sequence as specified in the Hardware Design
Document.

Fixes: 08e49af50701 ("phy: qcom: Introduce M31 USB PHY driver")
Cc: stable@kernel.org
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250630-ipq5332_hsphy_complaince-v2-1-63621439ebdb@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: exynos-mipi-video: correct cam0 sysreg property name for exynos7870 2025-07-22T13:14:51+00:00 Kaustabh Chakraborty kauschluss@disroot.org 2025-07-10T11:12:48+00:00 f31ac39c037a77a87e210b0f6d86fdefe8fc7258 Fix the cam0 sysreg property name (samsung,cam0-sysreg), which has been erroneously declared as samsung,cam-sysreg. This follows the same name used in Exynos5433 PHY. Fixes: 543f5e314282 ("phy: exynos-mipi-video: introduce support for exynos7870") Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Link: https://lore.kernel.org/r/20250710-exynos7870-mipi-phy-fix-v2-1-5cf50d69c9d7@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Fix the cam0 sysreg property name (samsung,cam0-sysreg), which has been
erroneously declared as samsung,cam-sysreg. This follows the same name
used in Exynos5433 PHY.

Fixes: 543f5e314282 ("phy: exynos-mipi-video: introduce support for exynos7870")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Link: https://lore.kernel.org/r/20250710-exynos7870-mipi-phy-fix-v2-1-5cf50d69c9d7@disroot.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: qcom: phy-qcom-snps-eusb2: Update init sequence per HPG 1.0.2 2025-07-22T12:35:45+00:00 Luca Weiss luca.weiss@fairphone.com 2025-07-15T07:29:37+00:00 828c3e9dce25a9551e52fd076136f4d9936c0498 The eUSB2 HPG version 1.0.2 asks to clear bits [7:1] on all targets. Implement that change in the driver to follow. See also https://lore.kernel.org/linux-arm-msm/7d073433-f254-4d75-a68b-d184f900294a@oss.qualcomm.com/ Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250715-sm7635-eusb-phy-v3-4-6c3224085eb6@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
The eUSB2 HPG version 1.0.2 asks to clear bits [7:1] on all targets.
Implement that change in the driver to follow.

See also https://lore.kernel.org/linux-arm-msm/7d073433-f254-4d75-a68b-d184f900294a@oss.qualcomm.com/

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250715-sm7635-eusb-phy-v3-4-6c3224085eb6@fairphone.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: qcom: phy-qcom-snps-eusb2: Add missing write from init sequence 2025-07-22T12:35:45+00:00 Luca Weiss luca.weiss@fairphone.com 2025-07-15T07:29:36+00:00 7f5f703210109366c1e1b685086c9b0a4897ea54 As per a commit from Qualcomm's downstream 6.1 kernel[0], the init sequence is missing setting the CMN_CTRL_OVERRIDE_EN bit back to 0 at the end, as per the 'latest' HPG revision (as of November 2023). [0] https://git.codelinaro.org/clo/la/kernel/qcom/-/commit/b77774a89e3fda3246e09dd39e16e2ab43cd1329 Fixes: 80090810f5d3 ("phy: qcom: Add QCOM SNPS eUSB2 driver") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-eusb-phy-v3-3-6c3224085eb6@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
As per a commit from Qualcomm's downstream 6.1 kernel[0], the init
sequence is missing setting the CMN_CTRL_OVERRIDE_EN bit back to 0 at
the end, as per the 'latest' HPG revision (as of November 2023).

[0] https://git.codelinaro.org/clo/la/kernel/qcom/-/commit/b77774a89e3fda3246e09dd39e16e2ab43cd1329

Fixes: 80090810f5d3 ("phy: qcom: Add QCOM SNPS eUSB2 driver")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250715-sm7635-eusb-phy-v3-3-6c3224085eb6@fairphone.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: rockchip-pcie: Properly disable TEST_WRITE strobe signal 2025-07-22T12:28:45+00:00 Geraldo Nascimento geraldogabriel@gmail.com 2025-06-30T22:25:28+00:00 25facbabc3fc33c794ad09d73f73268c0f8cbc7d pcie_conf is used to touch TEST_WRITE strobe signal. This signal should be enabled, a little time waited, and then disabled. Current code clearly was copy-pasted and never disables the strobe signal. Adjust the define. While at it, remove PHY_CFG_RD_MASK which has been unused since 64cdc0360811 ("phy: rockchip-pcie: remove unused phy_rd_cfg function"). Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Geraldo Nascimento <geraldogabriel@gmail.com> Link: https://lore.kernel.org/r/d514d5d5627680caafa8b7548cbdfee4307f5440.1751322015.git.geraldogabriel@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
pcie_conf is used to touch TEST_WRITE strobe signal. This signal should
be enabled, a little time waited, and then disabled. Current code clearly
was copy-pasted and never disables the strobe signal. Adjust the define.
While at it, remove PHY_CFG_RD_MASK which has been unused since
64cdc0360811 ("phy: rockchip-pcie: remove unused phy_rd_cfg function").

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Geraldo Nascimento <geraldogabriel@gmail.com>
Link: https://lore.kernel.org/r/d514d5d5627680caafa8b7548cbdfee4307f5440.1751322015.git.geraldogabriel@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: rockchip-pcie: Enable all four lanes if required 2025-07-22T12:28:44+00:00 Valmantas Paliksa walmis@gmail.com 2025-06-30T22:25:14+00:00 c3fe7071e196e25789ecf90dbc9e8491a98884d7 Current code enables only Lane 0 because pwr_cnt will be incremented on first call to the function. Let's reorder the enablement code to enable all 4 lanes through GRF. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Valmantas Paliksa <walmis@gmail.com> Signed-off-by: Geraldo Nascimento <geraldogabriel@gmail.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/16b610aab34e069fd31d9f57260c10df2a968f80.1751322015.git.geraldogabriel@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Current code enables only Lane 0 because pwr_cnt will be incremented on
first call to the function. Let's reorder the enablement code to enable
all 4 lanes through GRF.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>

Signed-off-by: Valmantas Paliksa <walmis@gmail.com>
Signed-off-by: Geraldo Nascimento <geraldogabriel@gmail.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/16b610aab34e069fd31d9f57260c10df2a968f80.1751322015.git.geraldogabriel@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: qcom: fix error code in snps_eusb2_hsphy_probe() 2025-07-15T15:06:47+00:00 Harshit Mogalapalli harshit.m.mogalapalli@oracle.com 2025-07-10T17:24:02+00:00 b7acfeab8af9ee661c933522132f3d1d92ed12d6 When phy->ref_clk is NULL PTR_ERR(NULL) will be a success. Fix this by using -ENOENT when phy->ref_clk is NULL instead. Fixes: 80090810f5d3 ("phy: qcom: Add QCOM SNPS eUSB2 driver") Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/all/aDCbeuCTy9zyWJAM@stanley.mountain/ Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com> Link: https://lore.kernel.org/r/20250710172403.2593193-1-harshit.m.mogalapalli@oracle.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
When phy->ref_clk is NULL PTR_ERR(NULL) will be a success. Fix this by
using -ENOENT when phy->ref_clk is NULL instead.

Fixes: 80090810f5d3 ("phy: qcom: Add QCOM SNPS eUSB2 driver")
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/all/aDCbeuCTy9zyWJAM@stanley.mountain/
Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com>
Link: https://lore.kernel.org/r/20250710172403.2593193-1-harshit.m.mogalapalli@oracle.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750 2025-06-27T00:11:08+00:00 Krzysztof Kozlowski krzysztof.kozlowski@linaro.org 2025-06-16T06:25:42+00:00 304c102cff7382353a28039907a7017bde795db9 Add missing DP PHY status and VCO clock configuration registers to fix configuring the VCO rate on SM8750. Without proper VCO rate setting, it works on after-reset half of rate which is not enough for DP over USB to work as seen on logs: [drm:msm_dp_ctrl_link_train_1_2] *ERROR* max v_level reached [drm:msm_dp_ctrl_link_train_1_2] *ERROR* link training #1 on phy 0 failed. ret=-11 Fixes: c4364048baf4 ("phy: qcom: qmp-combo: Add new PHY sequences for SM8750") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250616062541.7167-2-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Add missing DP PHY status and VCO clock configuration registers to fix
configuring the VCO rate on SM8750.  Without proper VCO rate setting, it
works on after-reset half of rate which is not enough for DP over USB to
work as seen on logs:

  [drm:msm_dp_ctrl_link_train_1_2] *ERROR* max v_level reached
  [drm:msm_dp_ctrl_link_train_1_2] *ERROR* link training #1 on phy 0 failed. ret=-11

Fixes: c4364048baf4 ("phy: qcom: qmp-combo: Add new PHY sequences for SM8750")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250616062541.7167-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>