linux-toradex.git/drivers/pinctrl/Kconfig, branch v4.1.12 Linux kernel for Apalis and Colibri modules pinctrl: fix allmodconfig noise 2015-04-15T08:02:42+00:00 Linus Walleij linus.walleij@linaro.org 2015-04-15T08:00:35+00:00 b99e6fb86541e4dc28f5c3ff7418347fa9d8d29c There was some mess in the dependencies in the pinctrl Kconfig for compile tests under allmodconfig. Mea Culpa. Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
There was some mess in the dependencies in the pinctrl
Kconfig for compile tests under allmodconfig. Mea Culpa.

Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: add AMD GPIO driver support. 2015-03-18T01:02:21+00:00 Ken Xue Ken.Xue@amd.com 2015-03-10T07:02:19+00:00 dbad75dd1f25e0107c643d42774a7f9a8ba85e9b KERNCZ GPIO is a new IP from AMD. it can be implemented in both x86 and ARM. Current driver patch only support GPIO in x86. Signed-off-by: Ken Xue <Ken.Xue@amd.com> [Moved back to <linux/gpio.h> header] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
KERNCZ GPIO is a new IP from AMD. it can be implemented in both x86 and ARM.
Current driver patch only support GPIO in x86.

Signed-off-by: Ken Xue <Ken.Xue@amd.com>
[Moved back to <linux/gpio.h> header]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: mediatek: Add Pinctrl/GPIO driver for mt8135. 2015-03-18T01:02:14+00:00 Hongzhou Yang hongzhou.yang@mediatek.com 2015-01-21T05:28:15+00:00 a6df410d420aa4ff316797d352f69e7ebae5ff98 The mediatek SoCs have GPIO controller that handle both the muxing and GPIOs. The GPIO controller have pinmux, pull enable, pull select, direction and output high/low control. This driver include common driver and mt8135 part. The common driver include the pinctrl driver and GPIO driver. The mt8135 part contain its special device data. Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The mediatek SoCs have GPIO controller that handle both the muxing and GPIOs.

The GPIO controller have pinmux, pull enable, pull select, direction and output high/low control.

This driver include common driver and mt8135 part.
The common driver include the pinctrl driver and GPIO driver.
The mt8135 part contain its special device data.

Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: bcm: consolidate Broadcom pinctrl drivers 2015-03-18T01:02:12+00:00 Ray Jui rjui@broadcom.com 2015-03-05T00:35:49+00:00 b17f2f9b86f4d44b1d90abf5f1d8de423a74c772 Consolidate Broadcom pinctrl drivers into drivers/pinctrl/bcm/* Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Consolidate Broadcom pinctrl drivers into drivers/pinctrl/bcm/*

Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: tegra: add a driver for Tegra210 2015-03-09T17:10:59+00:00 Stephen Warren swarren@nvidia.com 2015-02-24T21:00:51+00:00 9184f756908ace8213099f21870b07491a7138a9 Tegra210's pinmux supports a different set of pins/options than earlier SoCs, so requires its own driver (well, table of pin-specific data). Cc: devicetree@vger.kernel.org Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Tegra210's pinmux supports a different set of pins/options than earlier
SoCs, so requires its own driver (well, table of pin-specific data).

Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: add driver for Amlogic Meson SoCs 2015-01-26T08:13:00+00:00 Beniamino Galvani b.galvani@gmail.com 2015-01-17T18:15:14+00:00 6ac730951104a437bf828683bcf9ba66336c4fa7 This is a driver for the pinmux and GPIO controller available in Amlogic Meson SoCs. It currently supports only Meson8, however the common code should be generic enough to work also for other SoCs after having defined the proper set of functions and groups. GPIO interrupts are not supported at the moment due to lack of documentation. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
This is a driver for the pinmux and GPIO controller available in
Amlogic Meson SoCs. It currently supports only Meson8, however the
common code should be generic enough to work also for other SoCs after
having defined the proper set of functions and groups.

GPIO interrupts are not supported at the moment due to lack of
documentation.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: sirf: drop marco support 2015-01-14T13:21:54+00:00 Barry Song Baohua.Song@csr.com 2015-01-11T13:56:41+00:00 a17272a46ce1133d1b2232d6584d947565b720ee marco chip has been dropped, clear its support. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
marco chip has been dropped, clear its support.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: Add driver for Zynq 2015-01-11T21:35:19+00:00 Soren Brinkmann soren.brinkmann@xilinx.com 2015-01-09T15:43:48+00:00 add958cee967df0a6d003e59b104ba9a6f263e00 This adds a pin-control driver for Zynq. Changes since v2: - driver-specific DT properties are passed to the core in two arrays, one for the actual DT parsing one for the debugfs representation. Issue a compiler warning when the number of entries is not the same for both arrays. Changes since v1: - fix EMIO_SD1_CD pin name - add USB to pinmux options changes since RFCv2: - let Zynq select PINCTRL_ZYNQ. Boot hangs when pinctrl information is present in DT but no driver available. - add #defines to get rid of magical constants - add commas at end of initializers - separate changes in mach-zynq in separate patch - add driver specific io-standard DT property - refactored pinconf set function to not require arguments for argument-less properties - squash other patches in - support for IO-standard property - support for low-power mode property - migration to pinconf_generic_dt_node_to_map_all() - use newly created infrastructure to add pass driver-specific DT params to pinconf-generic changes since RFC: - use syscon/regmap to access registers in SLCR space - rebase to 3.18: rename enable -> set_mux - add kernel-doc - support pinconf - supported attributes - pin-bias: pull up, tristate, disable - slew-rate: 0 == slow, 1 == fast; generic pinconf does not display argument Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
This adds a pin-control driver for Zynq.

Changes since v2:
- driver-specific DT properties are passed to the core in two arrays,
  one for the actual DT parsing one for the debugfs representation.
  Issue a compiler warning when the number of entries is not the same
  for both arrays.

Changes since v1:
 - fix EMIO_SD1_CD pin name
 - add USB to pinmux options

changes since RFCv2:
 - let Zynq select PINCTRL_ZYNQ. Boot hangs when pinctrl information is
   present in DT but no driver available.
 - add #defines to get rid of magical constants
 - add commas at end of initializers
 - separate changes in mach-zynq in separate patch
 - add driver specific io-standard DT property
 - refactored pinconf set function to not require arguments for
   argument-less properties
 - squash other patches in
   - support for IO-standard property
   - support for low-power mode property
   - migration to pinconf_generic_dt_node_to_map_all()
 - use newly created infrastructure to add pass driver-specific DT
   params to pinconf-generic

changes since RFC:
 - use syscon/regmap to access registers in SLCR space
 - rebase to 3.18: rename enable -> set_mux
 - add kernel-doc
 - support pinconf
   - supported attributes
     - pin-bias: pull up, tristate, disable
     - slew-rate: 0 == slow, 1 == fast; generic pinconf does not display
       argument

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: Move Intel Baytrail pinctrl driver under intel directory 2014-10-29T09:35:20+00:00 Mika Westerberg mika.westerberg@linux.intel.com 2014-10-24T12:16:52+00:00 5fae8b86fdf083bc43bf759abad6661be9d0b9ac We are going to have more pinctrl drivers for Intel hardware so separate all our pin controller drivers to own directory. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
We are going to have more pinctrl drivers for Intel hardware so separate
all our pin controller drivers to own directory.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Merge tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio 2014-10-09T18:58:15+00:00 Linus Torvalds torvalds@linux-foundation.org 2014-10-09T18:58:15+00:00 ea584595fc85e65796335033dfca25ed655cd0ed Pull GPIO changes from Linus Walleij: "This is the bulk of GPIO changes for the v3.18 development cycle: - Increase the default ARCH_NR_GPIO from 256 to 512. This was done to avoid having a custom <asm/gpio.h> header for the x86 architecture - GPIO is custom and complicated enough as it is already! We want to move to a radix to store the descriptors going forward, and finally get rid of this fixed array size altogether. - Endgame patching of the gpio_remove() semantics initiated by Abdoulaye Berthe. It is not accepted by the system that the removal of a GPIO chip fails during eg reboot or shutdown, and therefore the return value has now painfully been refactored away. For special cases like GPIO expanders on a hot-pluggable bus like USB, we may later add some gpiochip_try_remove() call, but for the cases we have now, return values are moot. - Some incremental refactoring of the gpiolib core and ACPI GPIO library for more descriptor usage. - Refactor the chained IRQ handler set-up method to handle also threaded, nested interrupts and set up the parent IRQ correctly. Switch STMPE and TC3589x drivers to use this registration method. - Add a .irq_not_threaded flag to the struct gpio_chip, so that also GPIO expanders that block but are still not using threaded IRQ handlers. - New drivers for the ARM64 X-Gene SoC GPIO controller. - The syscon GPIO driver has been improved to handle the "DSP GPIO" found on the TI Keystone 2 SoC:s. - ADNP driver switched to use gpiolib irqchip helpers. - Refactor the DWAPB driver to support being instantiated from and MFD cell (platform device). - Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP, Xilinx and Crystalcove drivers. - Various minor fixes" * tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (52 commits) gpio: pch: Build context save/restore only for PM pinctrl: abx500: get rid of unused variable gpio: ks8695: fix 'else should follow close brace '}'' gpio: stmpe: add verbose debug code gpio: stmpe: fix up interrupt enable logic gpio: staticize xway_stp_init() gpio: handle also nested irqchips in the chained handler set-up gpio: set parent irq on chained handlers gpiolib: irqchip: use irq_find_mapping while removing irqchip gpio: crystalcove: support virtual GPIO pinctrl: bcm281xx: make Kconfig dependency more strict gpio: kona: enable only on BCM_MOBILE or for compile testing gpio, bcm-kona, LLVMLinux: Remove use of __initconst gpio: Fix ngpio in gpio-xilinx driver gpio: dwapb: fix pointer to integer cast gpio: xgene: Remove unneeded #ifdef CONFIG_OF guard gpio: xgene: Remove unneeded forward declation for struct xgene_gpio gpio: xgene: Fix missing spin_lock_init() gpio: ks8695: fix switch case indentation gpiolib: add irq_not_threaded flag to gpio_chip ... 
Pull GPIO changes from Linus Walleij:
 "This is the bulk of GPIO changes for the v3.18 development cycle:

   - Increase the default ARCH_NR_GPIO from 256 to 512.  This was done
     to avoid having a custom <asm/gpio.h> header for the x86
     architecture - GPIO is custom and complicated enough as it is
     already! We want to move to a radix to store the descriptors going
     forward, and finally get rid of this fixed array size altogether.

   - Endgame patching of the gpio_remove() semantics initiated by
     Abdoulaye Berthe.  It is not accepted by the system that the
     removal of a GPIO chip fails during eg reboot or shutdown, and
     therefore the return value has now painfully been refactored away.
     For special cases like GPIO expanders on a hot-pluggable bus like
     USB, we may later add some gpiochip_try_remove() call, but for the
     cases we have now, return values are moot.

   - Some incremental refactoring of the gpiolib core and ACPI GPIO
     library for more descriptor usage.

   - Refactor the chained IRQ handler set-up method to handle also
     threaded, nested interrupts and set up the parent IRQ correctly.
     Switch STMPE and TC3589x drivers to use this registration method.

   - Add a .irq_not_threaded flag to the struct gpio_chip, so that also
     GPIO expanders that block but are still not using threaded IRQ
     handlers.

   - New drivers for the ARM64 X-Gene SoC GPIO controller.

   - The syscon GPIO driver has been improved to handle the "DSP GPIO"
     found on the TI Keystone 2 SoC:s.

   - ADNP driver switched to use gpiolib irqchip helpers.

   - Refactor the DWAPB driver to support being instantiated from and
     MFD cell (platform device).

   - Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP,
     Xilinx and Crystalcove drivers.

   - Various minor fixes"

* tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (52 commits)
  gpio: pch: Build context save/restore only for PM
  pinctrl: abx500: get rid of unused variable
  gpio: ks8695: fix 'else should follow close brace '}''
  gpio: stmpe: add verbose debug code
  gpio: stmpe: fix up interrupt enable logic
  gpio: staticize xway_stp_init()
  gpio: handle also nested irqchips in the chained handler set-up
  gpio: set parent irq on chained handlers
  gpiolib: irqchip: use irq_find_mapping while removing irqchip
  gpio: crystalcove: support virtual GPIO
  pinctrl: bcm281xx: make Kconfig dependency more strict
  gpio: kona: enable only on BCM_MOBILE or for compile testing
  gpio, bcm-kona, LLVMLinux: Remove use of __initconst
  gpio: Fix ngpio in gpio-xilinx driver
  gpio: dwapb: fix pointer to integer cast
  gpio: xgene: Remove unneeded #ifdef CONFIG_OF guard
  gpio: xgene: Remove unneeded forward declation for struct xgene_gpio
  gpio: xgene: Fix missing spin_lock_init()
  gpio: ks8695: fix switch case indentation
  gpiolib: add irq_not_threaded flag to gpio_chip
  ...