<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/pinctrl/intel/pinctrl-broxton.c, branch v4.16-rc6</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>pinctrl: broxton: No need to take pointer of a pointer</title>
<updated>2017-01-30T13:45:12+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2017-01-26T15:10:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=82bbd8c8400edea612505ab8992bf53e540cda75'/>
<id>82bbd8c8400edea612505ab8992bf53e540cda75</id>
<content type='text'>
There is no need to take pointer of a pointer to an array of SoC data in
platform driver.

Do it in the same way as it's done for ACPI.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is no need to take pointer of a pointer to an array of SoC data in
platform driver.

Do it in the same way as it's done for ACPI.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'v4.10-rc6' into devel</title>
<updated>2017-01-30T13:39:20+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2017-01-30T13:39:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7f36f5d11cda050b118f76d774151427a18d15ef'/>
<id>7f36f5d11cda050b118f76d774151427a18d15ef</id>
<content type='text'>
Linux 4.10-rc6

Resolved conflicts in:
	drivers/pinctrl/pinctrl-amd.c
	drivers/pinctrl/samsung/pinctrl-exynos.c
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Linux 4.10-rc6

Resolved conflicts in:
	drivers/pinctrl/pinctrl-amd.c
	drivers/pinctrl/samsung/pinctrl-exynos.c
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: broxton: Rename apl-pinctrl driver</title>
<updated>2017-01-26T14:37:40+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2017-01-25T20:29:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ece2dac9f13eff4ce446c08ca5e76b1b0188089b'/>
<id>ece2dac9f13eff4ce446c08ca5e76b1b0188089b</id>
<content type='text'>
While we have no users yet rename the platform driver to use the same
pattern as the rest of Intel SoCs, i.e. use full SoC name in
'apollolake-pinctrl'.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
While we have no users yet rename the platform driver to use the same
pattern as the rest of Intel SoCs, i.e. use full SoC name in
'apollolake-pinctrl'.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: intel: Convert to use devm_gpiochip_add_data()</title>
<updated>2017-01-11T12:52:37+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-01-10T14:31:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f25c3aa9085e9625f3dcc20152dd780d01a54c5a'/>
<id>f25c3aa9085e9625f3dcc20152dd780d01a54c5a</id>
<content type='text'>
This simplifies error handling and allows us to drop intel_pinctrl_remove()
completely.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This simplifies error handling and allows us to drop intel_pinctrl_remove()
completely.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: broxton: Use correct PADCFGLOCK offset</title>
<updated>2017-01-11T12:47:11+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-01-10T14:31:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ecc8995363ee6231b32dad61c955b371b79cc4cf'/>
<id>ecc8995363ee6231b32dad61c955b371b79cc4cf</id>
<content type='text'>
PADCFGLOCK (and PADCFGLOCK_TX) offset in Broxton actually starts at 0x060
and not 0x090 as used in the driver. Fix it to use the correct offset.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
PADCFGLOCK (and PADCFGLOCK_TX) offset in Broxton actually starts at 0x060
and not 0x090 as used in the driver. Fix it to use the correct offset.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl/broxton: enable platform device in the absence of ACPI enumeration</title>
<updated>2016-06-15T06:37:42+00:00</updated>
<author>
<name>Tan Jui Nee</name>
<email>jui.nee.tan@intel.com</email>
</author>
<published>2016-06-07T06:55:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0c3013bbe1d80035dc58336c4c7fdb18a32931df'/>
<id>0c3013bbe1d80035dc58336c4c7fdb18a32931df</id>
<content type='text'>
This is to cater the need for non-ACPI system whereby
a platform device has to be created in order to bind
with the Apollo Lake Pinctrl GPIO platform driver.

Signed-off-by: Tan Jui Nee &lt;jui.nee.tan@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is to cater the need for non-ACPI system whereby
a platform device has to be created in order to bind
with the Apollo Lake Pinctrl GPIO platform driver.

Signed-off-by: Tan Jui Nee &lt;jui.nee.tan@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: intel: fix bug of register offset calculation</title>
<updated>2015-12-10T22:01:41+00:00</updated>
<author>
<name>Qipeng Zha</name>
<email>qipeng.zha@intel.com</email>
</author>
<published>2015-11-25T17:09:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=618a919b4c5150408c26f8b4527851f7065f841c'/>
<id>618a919b4c5150408c26f8b4527851f7065f841c</id>
<content type='text'>
The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS,
GPI_IE, are not 24 for Broxton, Add a parameter to allow
different platform to set correct value.

Signed-off-by: Qi Zheng &lt;qi.zheng@intel.com&gt;
Signed-off-by: Qipeng Zha &lt;qipeng.zha@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS,
GPI_IE, are not 24 for Broxton, Add a parameter to allow
different platform to set correct value.

Signed-off-by: Qi Zheng &lt;qi.zheng@intel.com&gt;
Signed-off-by: Qipeng Zha &lt;qipeng.zha@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: intel: Add Intel Broxton pin controller support</title>
<updated>2015-10-27T12:32:13+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2015-10-21T10:08:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ee1a6ca43dba07465c71f6ab661702d703f5eb06'/>
<id>ee1a6ca43dba07465c71f6ab661702d703f5eb06</id>
<content type='text'>
This driver adds pinctrl/GPIO support for Intel Broxton. The GPIO
controller is based on the same hardware design that is already used in
Intel Sunrisepoint so we leverage the core driver here.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This driver adds pinctrl/GPIO support for Intel Broxton. The GPIO
controller is based on the same hardware design that is already used in
Intel Sunrisepoint so we leverage the core driver here.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
