linux-toradex.git/drivers/pinctrl/intel/pinctrl-intel.c, branch v5.12

pinctrl: intel: check REVID register value for device presence

2021-03-25T13:07:10+00:00

Use the value read from the REVID register in order to check for the
presence of the device. A read of all ones is treated as if the device
is not present, and hence probing is ended.

This fixes an issue when running as a Xen PVH dom0, where the ACPI
DSDT table is provided unmodified to dom0 and hence contains the
pinctrl devices, but the MMIO region(s) containing the device
registers might not be mapped in the guest physical memory map if such
region(s) are not exposed on a PCI device BAR or marked as reserved in
the host memory map.

Fixes: 91d898e51e60 ("pinctrl: intel: Convert capability list to features")
Suggested-by: Andy Shevchenko 
Signed-off-by: Roger Pau Monné 
Signed-off-by: Andy Shevchenko

pinctrl: intel: Show the GPIO base calculation explicitly

2021-03-08T17:07:48+00:00

During the split of intel_pinctrl_add_padgroups(), the _by_size() variant
missed the GPIO base calculations and hence made unable to retrieve proper
GPIO number.

Assign the gpio_base explicitly in _by_size() variant.

While at it, differentiate NOMAP case with the rest in _by_gpps() variant.

Fixes: 036e126c72eb ("pinctrl: intel: Split intel_pinctrl_add_padgroups() for better maintenance")
Reported-and-tested-by: Maximilian Luz 
Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg

pinctrl: intel: Convert capability list to features

2021-01-08T14:04:30+00:00

Communities can have features provided in the capability list.
Traverse the list and convert to respective features.

Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg

pinctrl: intel: Drop unnecessary check for predefined features

2021-01-08T12:57:16+00:00

None of the drivers is overriding features. Remove unnecessary check.
While here, rename rev to value to make easier further development.

Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg

pinctrl: intel: Split intel_pinctrl_add_padgroups() for better maintenance

2021-01-08T12:57:16+00:00

Currently the intel_pinctrl_add_padgroups() is twisted a bit due to
a different nature of the pin control hardware implementations. Thus,
its maintenance is a bit hard. Besides that some pieces of code
are run on all hardware and make this code slightly inefficient,
and moreover, validation for one case is done in a wrong time in a flow
which makes it even slower.

Split intel_pinctrl_add_padgroups() to two functions, one per hardware
implementation, for better maintenance and readability.

Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg

pinctrl: intel: Actually disable Tx and Rx buffers on GPIO request

2020-12-09T08:08:18+00:00

Mistakenly the buffers (input and output) become enabled together for a short
period of time during GPIO request. This is problematic, because instead of
initial motive to disable them in the commit af7e3eeb84e2
("pinctrl: intel: Disable input and output buffer when switching to GPIO"),
the driven value on the pin, which might be used as an IRQ line, brings
firmwares of some touch pads to an awkward state that needs a full power off
to recover. Fix this, as stated in the culprit commit, by disabling the buffers.

Fixes: af7e3eeb84e2 ("pinctrl: intel: Disable input and output buffer when switching to GPIO")
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=210497
Reported-by: Pierre-Louis Bossart 
Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg 
Tested-by: Pierre-Louis Bossart 
Tested-by: Kai-Heng Feng 
Link: https://lore.kernel.org/r/20201208182403.40435-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij

pinctrl: intel: Set default bias in case no particular value given

2020-10-26T11:26:50+00:00

When GPIO library asks pin control to set the bias, it doesn't pass
any value of it and argument is considered boolean (and this is true
for ACPI GpioIo() / GpioInt() resources, by the way). Thus, individual
drivers must behave well, when they got the resistance value of 1 Ohm,
i.e. transforming it to sane default.

In case of Intel pin control hardware the 5 kOhm sounds plausible
because on one hand it's a minimum of resistors present in all
hardware generations and at the same time it's high enough to minimize
leakage current (will be only 200 uA with the above choice).

Fixes: e57725eabf87 ("pinctrl: intel: Add support for hardware debouncer")
Reported-by: Jamie McClymont 
Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg

pinctrl: intel: Fix 2 kOhm bias which is 833 Ohm

2020-10-26T11:26:49+00:00

2 kOhm bias was never an option in Intel GPIO hardware, the available
matrix is:

	000	none
	001	1 kOhm (if available)
	010	5 kOhm
	100	20 kOhm

As easy to get the 3 resistors are gated separately and according to
parallel circuits calculations we may get combinations of the above where
the result is always strictly less than minimal resistance. Hence,
additional values can be:

	011	~833.3 Ohm
	101	~952.4 Ohm
	110	~4 kOhm
	111	~800 Ohm

That said, convert TERM definitions to be the bit masks to reflect the above.

While at it, enable the same setting for pull down case.

Fixes: 7981c0015af2 ("pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support")
Cc: Jamie McClymont 
Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg

pinctrl: intel: Extract intel_pinctrl_get_soc_data() helper for wider use

2020-08-18T13:46:39+00:00

intel_pinctrl_get_soc_data() helper can be used in few driver instead of
open-coded variants. Thus, extract it as a standalone API.

Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg

pinctrl: intel: Make use of for_each_requested_gpio_in_range()

2020-06-22T08:01:59+00:00

Make use of for_each_requested_gpio_in_range() instead of home grown analogue.

Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg