linux-toradex.git/drivers/pinctrl/nuvoton, branch v6.12-rc1 Linux kernel for Apalis and Colibri modules pinctrl: nuvoton: npcm8xx: modify pins flags 2024-08-05T07:32:35+00:00 Tomer Maimon tmaimon77@gmail.com 2024-07-16T19:40:08+00:00 14411957096609b172a2d9fc1c985daa5c80f23d Modify the following pins flags on the Nuvoton NPCM8XX BMC: - Add pins 110-113, 187, 191, 192, 194-199, 202 SLEW flag - Add pins 229 and 230 GPO flag. - Remove pin 233 SLEWLPC flag. - Remove pin 251 SLEW flag. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-8-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Modify the following pins flags on the Nuvoton NPCM8XX BMC:
- Add pins 110-113, 187, 191, 192, 194-199, 202 SLEW flag
- Add pins 229 and 230 GPO flag.
- Remove pin 233 SLEWLPC flag.
- Remove pin 251 SLEW flag.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-8-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration 2024-08-05T07:32:35+00:00 Tomer Maimon tmaimon77@gmail.com 2024-07-16T19:40:07+00:00 db5edf0f5c1ec28b3c63d6f1f574ba087ea4006c Modify clkrun and serirq pin configuration on the Nuvoton NPCM8XX BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-7-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Modify clkrun and serirq pin configuration on the Nuvoton NPCM8XX BMC
SoC.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-7-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group 2024-08-05T07:32:34+00:00 Tomer Maimon tmaimon77@gmail.com 2024-07-16T19:40:06+00:00 d66fad91c9f37abd1d8e2c4a96dde1f861cf59d7 Add pin 250 to DDR pins group on the Nuvoton NPCM8xx BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-6-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add pin 250 to DDR pins group on the Nuvoton NPCM8xx BMC SoC.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-6-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36 2024-08-05T07:32:34+00:00 Tomer Maimon tmaimon77@gmail.com 2024-07-16T19:40:05+00:00 4edcebbb4399ebd10f7c05293cdd74b598c7fd96 This patch adds support for GPIO pins GPI35 and GPI36 on the Nuvoton NPCM8xx BMC SoC. The pins are configured for only for input. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-5-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
This patch adds support for GPIO pins GPI35 and GPI36 on the Nuvoton
NPCM8xx BMC SoC.

The pins are configured for only for input.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-5-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: nuvoton: npcm8xx: clear polarity before set both edge 2024-08-05T07:32:34+00:00 Tomer Maimon tmaimon77@gmail.com 2024-07-16T19:40:04+00:00 92f5f86b064f1c50c33c74cb087bfbe3e53479d0 Clear polarity before setting both edges to ensure that the polarity is in the same state before configuring events for both edges Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-4-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Clear polarity before setting both edges to ensure that the polarity is
in the same state before configuring events for both edges

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-4-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: nuvoton: npcm8xx: remove non-existent pins, groups, functions 2024-08-05T07:32:34+00:00 Tomer Maimon tmaimon77@gmail.com 2024-07-16T19:40:03+00:00 20070bdc1c74dcb8c899d940fa7e92d9f732687f Remove non-existent smb4den abd lpcclk pins, groups and functions on the Nuvoton NPCM8XX BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-3-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Remove non-existent smb4den abd lpcclk pins, groups and functions on
the Nuvoton NPCM8XX BMC SoC.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-3-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: nuvoton: ma35d1: Fix an IS_ERR() vs NULL check 2024-06-17T09:01:47+00:00 Dan Carpenter dan.carpenter@linaro.org 2024-06-12T10:43:33+00:00 d81889c15871f350b213566a43f09943f93fb706 The fwnode_iomap() function doesn't return error pointers, it returns NULL. It's the same as of_iomap() in that way. Update the check accordingly. Fixes: ecc5bf868673 ("pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/840152f9-d3bb-410e-8164-4c5043e1983e@moroto.mountain Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The fwnode_iomap() function doesn't return error pointers, it returns
NULL.  It's the same as of_iomap() in that way.  Update the check
accordingly.

Fixes: ecc5bf868673 ("pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/840152f9-d3bb-410e-8164-4c5043e1983e@moroto.mountain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver 2024-06-17T07:22:03+00:00 Jacky Huang ychuang3@nuvoton.com 2024-05-21T01:24:47+00:00 f805e356313bbcafef48808c14eb9ce7f4ff2560 Add common pinctrl and GPIO driver for Nuvoton MA35 series SoC, and add support for ma35d1 pinctrl. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Link: https://lore.kernel.org/r/20240521012447.42211-4-ychuang570808@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add common pinctrl and GPIO driver for Nuvoton MA35 series SoC, and
add support for ma35d1 pinctrl.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Link: https://lore.kernel.org/r/20240521012447.42211-4-ychuang570808@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: nuvoton: Constify wpcm450_groups 2024-02-07T10:46:02+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2023-12-11T15:42:39+00:00 1a7a7aa1e4250da2971d1ff352cec7e5419af4dc There is no modifications are assumed for wpcm450_groups. Constify it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231211154239.4190429-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
There is no modifications are assumed for wpcm450_groups. Constify it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211154239.4190429-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP() 2023-12-07T09:53:57+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2023-12-04T15:56:36+00:00 583b5273a624e7d87b7038404cb1524450abdfbc The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro. Utilize them instead of open coded variants in the driver. Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231204160033.1872569-6-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro.
Utilize them instead of open coded variants in the driver.

Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231204160033.1872569-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>