<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/pinctrl/pinctrl-equilibrium.h, branch v5.8</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>pinctrl: Add pinmux &amp; GPIO controller driver for a new SoC</title>
<updated>2019-11-21T13:47:44+00:00</updated>
<author>
<name>Rahul Tanwar</name>
<email>rahul.tanwar@linux.intel.com</email>
</author>
<published>2019-11-15T09:25:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1948d5c51dba4e4e2652a5687991a6460d78b5d0'/>
<id>1948d5c51dba4e4e2652a5687991a6460d78b5d0</id>
<content type='text'>
Intel Lightning Mountain SoC has a pinmux controller &amp; GPIO controller IP which
controls pin multiplexing &amp; configuration including GPIO functions selection &amp;
GPIO attributes configuration.

This IP is not based on &amp; does not have anything in common with Chassis
specification. The pinctrl drivers under pinctrl/intel/* are all based upon
Chassis spec compliant pinctrl IPs. So this driver doesn't fit &amp; can not use
pinctrl framework under pinctrl/intel/* and it requires a separate new driver.

Add a new GPIO &amp; pin control framework based driver for this IP.

Signed-off-by: Rahul Tanwar &lt;rahul.tanwar@linux.intel.com&gt;
Link: https://lore.kernel.org/r/33e649758b70490f01724a887c490d5008c7656d.1573797249.git.rahul.tanwar@linux.intel.com
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Intel Lightning Mountain SoC has a pinmux controller &amp; GPIO controller IP which
controls pin multiplexing &amp; configuration including GPIO functions selection &amp;
GPIO attributes configuration.

This IP is not based on &amp; does not have anything in common with Chassis
specification. The pinctrl drivers under pinctrl/intel/* are all based upon
Chassis spec compliant pinctrl IPs. So this driver doesn't fit &amp; can not use
pinctrl framework under pinctrl/intel/* and it requires a separate new driver.

Add a new GPIO &amp; pin control framework based driver for this IP.

Signed-off-by: Rahul Tanwar &lt;rahul.tanwar@linux.intel.com&gt;
Link: https://lore.kernel.org/r/33e649758b70490f01724a887c490d5008c7656d.1573797249.git.rahul.tanwar@linux.intel.com
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
