linux-toradex.git/drivers/pinctrl/qcom/Kconfig, branch master

pinctrl: qcom: lpass-lpi: Switch to PM clock framework for runtime PM

2026-06-08T08:46:42+00:00

Convert the LPASS LPI pinctrl driver to use the PM clock framework for
runtime power management.

This allows the LPASS LPI pinctrl driver to drop clock votes when idle,
improves power efficiency on platforms using LPASS LPI island mode, and
aligns the driver with common runtime PM patterns used across Qualcomm
LPASS subsystems.

Guard GPIO register read/write helpers and slew-rate register programming
with synchronous runtime PM calls so the device is active during MMIO
operations whenever autosuspend is enabled.

Make PINCTRL_LPASS_LPI depend on PM_CLK, since this patch introduces
direct PM clock API use in the shared core.

Suggested-by: Konrad Dybcio 
Signed-off-by: Ajay Kumar Nandam 
Signed-off-by: Linus Walleij

pinctrl: qcom: Make important drivers default (1)

2026-05-06T19:10:08+00:00

The main SoC TLMM (Top-Level Multiplexer) pin controller drivers are
essential for booting up SoCs and are not really optional for a given
platform.  Kernel should not ask users choice of drivers when that
choice is obvious and known to the developers that answer should be
'yes' or 'module'.

Switch all Qualcomm TLMM pin controller drivers to a default 'yes' for
ARCH_QCOM.  This has impact:

1. arm64 defconfig: enable PINCTRL_SM7150, PINCTRL_IPQ9650 and
   PINCTRL_HAWI, which were not selected before but should be, because
   these platforms need them for proper boot.

2. arm qcom_defconfig: no changes.

3. arm multi_v7 defconfig: enable drivers necessary to boot ARM 32-bit
   platforms, which are already enabled on qcom_defconfig.

4. COMPILE_TEST builds: enable by default all drivers for arm or arm64
   builds, whenever ARCH_QCOM is selected.  This has impact on build
   time and feels logical, because if one selects ARCH_QCOM then
   probably by default wants to build test it entirely.  Kernels with
   COMPILE_TEST are not supposed to be used for booting.

Reviewed-by: Konrad Dybcio 
Reviewed-by: Linus Walleij 
Signed-off-by: Krzysztof Kozlowski 
Reviewed-by: Dmitry Baryshkov 
[linusw@kernel.org: Split off the defconfig changes to a separate patch]
Signed-off-by: Linus Walleij

pinctrl: qcom: Add SM6350 LPASS LPI TLMM

2026-05-06T19:05:15+00:00

Add support for the pin controller block on SM6350 Low Power Island.

Reviewed-by: Dmitry Baryshkov 
Reviewed-by: Konrad Dybcio 
Signed-off-by: Luca Weiss 
[linusw@kernel.org: fixed up Kconfig entry]
Signed-off-by: Linus Walleij

pinctrl: qcom: Unify user-visible "Qualcomm" name

2026-04-28T09:47:26+00:00

Various names for Qualcomm as a company are used in user-visible config
options: QCOM, Qualcomm and Qualcomm Technologies.  Switch to unified
"Qualcomm" so it will be easier for users to identify the options when
for example running menuconfig.

Signed-off-by: Krzysztof Kozlowski 
[linusw@kernel.org: Also fix the new IPQ9650]
Signed-off-by: Linus Walleij

pinctrl: qcom: add sdm670 lpi tlmm

2026-04-07T07:01:55+00:00

The Snapdragon 670 has an Low-Power Island (LPI) TLMM for configuring
pins related to audio. Add the driver for this.

Signed-off-by: Richard Acayan 
Reviewed-by: Konrad Dybcio 
Reviewed-by: Dmitry Baryshkov 
Signed-off-by: Linus Walleij

pinctrl: qcom: Add Milos LPASS LPI TLMM

2026-03-10T11:27:17+00:00

Add a driver for the pin controller in the Low Power Audio SubSystem
(LPASS) on the Milos SoC.

Signed-off-by: Luca Weiss 
Signed-off-by: Linus Walleij

pinctrl: qcom: sm8350-lpass-lpi: Merge with SC7280 to fix I2S2 and SWR TX pins

2026-01-19T00:13:22+00:00

Qualcomm SC7280 and SM8350 SoCs have slightly different LPASS audio
blocks (v9.4.5 and v9.2), however the LPASS LPI pin controllers are
exactly the same.  The driver for SM8350 has two issues, which can be
fixed by simply moving over to SC7280 driver which has them correct:

1. "i2s2_data_groups" listed twice GPIO12, but should have both GPIO12
   and GPIO13,

2. "swr_tx_data_groups" contained GPIO5 for "swr_tx_data2" function, but
   that function is also available on GPIO14, thus listing it twice is
   not necessary.  OTOH, GPIO5 has also "swr_rx_data1", so selecting
   swr_rx_data function should not block  the TX one.

Fixes: be9f6d56381d ("pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM")
Cc: stable@vger.kernel.org
Signed-off-by: Krzysztof Kozlowski 
Reviewed-by: Bartosz Golaszewski 
Reviewed-by: Konrad Dybcio 
Signed-off-by: Linus Walleij

pinctrl: qcom: Add SDM660 LPASS LPI TLMM

2025-09-10T13:35:42+00:00

The Snapdragon 660 has a Low-Power Island (LPI) TLMM for configuring
pins related to audio. Add the driver for this.
Also, this driver uses predefined pin_offsets for each pin taken from
downstream driver, which does not follow the usual 0x1000 distance
between pins and uses an array with predefined offsets that do not
follow any regular pattern [1].

[1] https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/LA.UM.7.2.c27-07400-sdm660.0/drivers/pinctrl/qcom/pinctrl-lpi.c#L107

Reviewed-by: Konrad Dybcio 
Signed-off-by: Richard Acayan 
Co-developed-by: Nickolay Goppen 
Signed-off-by: Nickolay Goppen 
Signed-off-by: Linus Walleij

pinctrl: qcom: use generic pin function helpers

2025-09-08T12:22:50+00:00

With the pinmux core no longer duplicating memory used to store the
struct pinfunction objects in .rodata, we can now use the existing
infrastructure for storing and looking up pin functions in qualcomm
drivers. Remove hand-crafted callbacks.

Reviewed-by: Konrad Dybcio 
Tested-by: Neil Armstrong 
Signed-off-by: Bartosz Golaszewski 
Signed-off-by: Linus Walleij

pinctrl: qcom: Introduce SM4250 LPI pinctrl driver

2024-06-26T10:41:07+00:00

Add support for the pin controller block on SM4250 Low Power Island.

Signed-off-by: Srinivas Kandagatla 
Reviewed-by: Krzysztof Kozlowski 
Reviewed-by: Dmitry Baryshkov 
Link: https://lore.kernel.org/20240612-sm4250-lpi-v4-2-a0342e47e21b@linaro.org
Signed-off-by: Linus Walleij