<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/pinctrl/renesas, branch v5.12</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge tag 'renesas-pinctrl-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel</title>
<updated>2021-01-18T15:11:42+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2021-01-18T15:11:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=dbbdb8da424b97d1b7d08f5e8f0cad8a31934c58'/>
<id>dbbdb8da424b97d1b7d08f5e8f0cad8a31934c58</id>
<content type='text'>
pinctrl: renesas: Updates for v5.12

  - Restrict debug runtime-checks to Renesas platforms,
  - Initial support for the R-Car V3U SoC.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
pinctrl: renesas: Updates for v5.12

  - Restrict debug runtime-checks to Renesas platforms,
  - Initial support for the R-Car V3U SoC.
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779a0: Add TPU pins, groups and functions</title>
<updated>2021-01-14T11:06:16+00:00</updated>
<author>
<name>Ulrich Hecht</name>
<email>uli+renesas@fpond.eu</email>
</author>
<published>2021-01-12T16:59:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a5cda861ed57710837bc560a3c715160da710555'/>
<id>a5cda861ed57710837bc560a3c715160da710555</id>
<content type='text'>
Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on the R-Car R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-13-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on the R-Car R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-13-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779a0: Add TMU pins, groups and functions</title>
<updated>2021-01-14T11:06:15+00:00</updated>
<author>
<name>Ulrich Hecht</name>
<email>uli+renesas@fpond.eu</email>
</author>
<published>2021-01-12T16:59:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b3761cd6e1565e3d20612f8f8499780625d80aa2'/>
<id>b3761cd6e1565e3d20612f8f8499780625d80aa2</id>
<content type='text'>
This patch adds TMU TCLK1-4 pins, groups and functions to the R8A779A0
(V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-12-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds TMU TCLK1-4 pins, groups and functions to the R8A779A0
(V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-12-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779a0: Add QSPI pins, groups, and functions</title>
<updated>2021-01-14T11:06:15+00:00</updated>
<author>
<name>Ulrich Hecht</name>
<email>uli+renesas@fpond.eu</email>
</author>
<published>2021-01-12T16:59:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a6a51403336b8a53945305143cf84960930b8215'/>
<id>a6a51403336b8a53945305143cf84960930b8215</id>
<content type='text'>
Add the QSPI0-1 pins, groups and functions to the R8A779A0 (V3U) PFC
driver.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-11-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the QSPI0-1 pins, groups and functions to the R8A779A0 (V3U) PFC
driver.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-11-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779a0: Add PWM pins, groups and functions</title>
<updated>2021-01-14T11:06:15+00:00</updated>
<author>
<name>Ulrich Hecht</name>
<email>uli+renesas@fpond.eu</email>
</author>
<published>2021-01-12T16:59:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=30db678101c71c06c84be9332932d9d2b70ed67c'/>
<id>30db678101c71c06c84be9332932d9d2b70ed67c</id>
<content type='text'>
This patch adds PWM0-4 pins, groups and functions to the R8A779A0 (V3U)
SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-10-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds PWM0-4 pins, groups and functions to the R8A779A0 (V3U)
SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-10-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779a0: Add MSIOF pins, groups and functions</title>
<updated>2021-01-14T11:06:15+00:00</updated>
<author>
<name>Ulrich Hecht</name>
<email>uli+renesas@fpond.eu</email>
</author>
<published>2021-01-12T16:59:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=88aac7aa7533d3735306d000746a03c0c5f324f6'/>
<id>88aac7aa7533d3735306d000746a03c0c5f324f6</id>
<content type='text'>
This patch adds MSIOF0-5 pins, groups and functions to R8A779A0 (V3U)
SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-9-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds MSIOF0-5 pins, groups and functions to R8A779A0 (V3U)
SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-9-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779a0: Add MMC pins, groups and functions</title>
<updated>2021-01-14T11:06:15+00:00</updated>
<author>
<name>Ulrich Hecht</name>
<email>uli+renesas@fpond.eu</email>
</author>
<published>2021-01-12T16:59:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2feb2d5cbabf8e23cf9762c579493662e034f5b8'/>
<id>2feb2d5cbabf8e23cf9762c579493662e034f5b8</id>
<content type='text'>
This patch adds MMC pins, groups and functions to R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Tested-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-8-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds MMC pins, groups and functions to R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Tested-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-8-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779a0: Add INTC-EX pins, groups and function</title>
<updated>2021-01-14T11:06:15+00:00</updated>
<author>
<name>Ulrich Hecht</name>
<email>uli+renesas@fpond.eu</email>
</author>
<published>2021-01-12T16:59:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8be8e8ee0230ad4c562f4606df9c1f9613063f14'/>
<id>8be8e8ee0230ad4c562f4606df9c1f9613063f14</id>
<content type='text'>
Add pins, groups, and function for the Interrupt Controller for External
Devices (INTC-EX) on the R-Car R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-7-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add pins, groups, and function for the Interrupt Controller for External
Devices (INTC-EX) on the R-Car R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-7-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779a0: Add HSCIF pins, groups and functions</title>
<updated>2021-01-14T11:06:15+00:00</updated>
<author>
<name>Ulrich Hecht</name>
<email>uli+renesas@fpond.eu</email>
</author>
<published>2021-01-12T16:59:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7e67ff6efc289e84a28a9609296e89d38a325a67'/>
<id>7e67ff6efc289e84a28a9609296e89d38a325a67</id>
<content type='text'>
This patch adds HSCIF0-3 pins, groups and functions to the R8A779A0
(V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Tested-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-6-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds HSCIF0-3 pins, groups and functions to the R8A779A0
(V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Tested-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-6-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779a0: Add DU pins, groups and function</title>
<updated>2021-01-14T11:06:15+00:00</updated>
<author>
<name>Ulrich Hecht</name>
<email>uli+renesas@fpond.eu</email>
</author>
<published>2021-01-12T16:59:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6e03446d0e3f6f281fa97dc3a3fad7fb649a1b83'/>
<id>6e03446d0e3f6f281fa97dc3a3fad7fb649a1b83</id>
<content type='text'>
This patch adds DU pins, groups and function for the R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-5-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds DU pins, groups and function for the R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Link: https://lore.kernel.org/r/20210112165929.31002-5-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</pre>
</div>
</content>
</entry>
</feed>
