linux-toradex.git/drivers/pinctrl/sh-pfc, branch v3.14.43

pinctrl: sh-pfc: r8a7791: SD1_CLK fix

2014-03-05T01:57:47+00:00

Fix the SD1_CLK handling for r8a7791. Without this patch
it is impossible to request all pins needed for SDHI1 on
the Koelsch board.

Signed-off-by: Magnus Damm 
Acked-by: Laurent Pinchart 
Signed-off-by: Linus Walleij

Merge tag 'pinctrl-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2014-01-21T18:14:10+00:00

Pull bulk pin control changes from Linus Walleij:
"This has been queued and tested for a while. Lots of action here,
like in the GPIO tree, embedded stuff like this is really hot now it
seems. Details in the signed tag. I'm especially happy about the
Qualcomm driver as it is used in such a huge subset of mobile handsets
out there, and these platforms in general need better upstream support

- New driver for the Qualcomm TLMM pin controller and its msm8x74
subdriver.

- New driver for the Broadcom Capri BCM281xx SoC.

- New subdriver for the imx25 pin controller.

- New subdriver for the Tegra124 pin controller.

- Lock GPIO lines as IRQs for select combined pin control and GPIO
drivers for baytrail and sirf.

- Some semi-big refactorings and extenstions to the sirf driver.

- Lots of patching, cleanup and fixing in the Renesas "PFC" driver
and associated subdrivers as usual. It is settling down a little
bit now it seems.

- Minor fixes and incremental updates here and there as usual"

* tag 'pinctrl-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
pinctrl: sunxi: Honor GPIO output initial vaules
pinctrl: capri: add dependency on OF
ARM: bcm11351: Enable pinctrl for Broadcom Capri SoCs
ARM: pinctrl: Add Broadcom Capri pinctrl driver
pinctrl: Add pinctrl binding for Broadcom Capri SoCs
pinctrl: Add void * to pinctrl_pin_desc
pinctrl: st: Fix a typo in probe
pinctrl: Fix some typos and grammar issues in the documentation
pinctrl: sirf: lock IRQs when starting them
pinctrl: sirf: put gpio interrupt pin into input status automatically
pinctrl: sirf: use only one irq_domain for the whole device node
pinctrl: single: fix infinite loop caused by bad mask
pinctrl: single: fix pcs_disable with bits_per_mux
pinctrl: single: fix DT bindings documentation
pinctrl: as3722: Set pin to output mode for some function
pinctrl: sirf: add pin group for USP0 with only RX or TX frame sync
pinctrl: sirf: fix the pins of sdmmc5 connected with TriG
pinctrl: sirf: add lost usp1_uart_nostreamctrl group for atlas6
pinctrl: sunxi: Add Allwinner A20 clock output pin functions
pinctrl/lantiq: fix typo
...

pinctrl: sh-pfc: r8a7791: Add I2C pins

2014-01-07T15:48:54+00:00

This adds I2C[0-4] pinmux support to R8A7791 SoC.

Signed-off-by: Valentine Barshak 
Signed-off-by: Laurent Pinchart 
Signed-off-by: Linus Walleij

pinctrl: sh-pfc: r8a7791: Add VIN pins

2014-01-07T15:48:50+00:00

This adds VIN[0-2] pinmux support to r8a7791 SoC.
VIN1 B mirror is also added along with the primary
configuration since it's the only one that provides
access to all 24 data bits on VIN1.

Signed-off-by: Valentine Barshak 
Signed-off-by: Laurent Pinchart 
Signed-off-by: Linus Walleij

pinctrl: sh-pfc: r8a7791: Group USB PWEN and OVC pins together

2014-01-07T15:48:46+00:00

This groups USB PWEN and OVC pins together on R8A7791 SoC,
the same way it's done on R8A7790, since both are needed
for a USB device.

Signed-off-by: Valentine Barshak 
Signed-off-by: Laurent Pinchart 
Signed-off-by: Linus Walleij

pinctrl: sh-pfc: r8a7790: Fix vsync value in the vin3_sync_mux array

2014-01-07T15:48:35+00:00

This fixes a typo in the vin3_sync_mux array (s/VI2/VI3/).

Signed-off-by: Valentine Barshak 
Signed-off-by: Laurent Pinchart 
Signed-off-by: Linus Walleij

pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays

2013-12-20T11:28:40+00:00

The arrays are never modified, declare them as const.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Linus Walleij

pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays

2013-12-20T11:27:43+00:00

The arrays are never modified, declare them as const.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Linus Walleij

pinctrl: sh-pfc: Constify IRQ GPIOs arrays

2013-12-20T11:26:54+00:00

The arrays are never modified, make them const.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Linus Walleij

pinctrl: sh-pfc: Constify enum_ids and var_field_width compound literals

2013-12-20T11:25:59+00:00

The enum_ids and var_field_width fields of struct pinmux_data_reg and
pinmux_cfg_reg are initialized using compound literals. Cast them to
const to store them in .rodata.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Linus Walleij