linux-toradex.git/drivers/pinctrl/sh-pfc, branch v4.9.28

pinctrl: sh-pfc: Do not unconditionally support PIN_CONFIG_BIAS_DISABLE

2017-01-19T19:18:08+00:00

commit 5d7400c4acbf7fe633a976a89ee845f7333de3e4 upstream.

Always stating PIN_CONFIG_BIAS_DISABLE is supported gives untrue output
when examining /sys/kernel/debug/pinctrl/e6060000.pfc/pinconf-pins if
the operation get_bias() is implemented but the pin is not handled by
the get_bias() implementation. In that case the output will state that
"input bias disabled" indicating that this pin has bias control
support.

Make support for PIN_CONFIG_BIAS_DISABLE depend on that the pin either
supports SH_PFC_PIN_CFG_PULL_UP or SH_PFC_PIN_CFG_PULL_DOWN. This also
solves the issue where SoC specific implementations print error messages
if their particular implementation of {set,get}_bias() is called with a
pin it does not know about.

Signed-off-by: Niklas Söderlund 
Acked-by: Laurent Pinchart 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Greg Kroah-Hartman

pinctrl: sh-pfc: Add helper to handle bias lookup table

2017-01-19T19:17:57+00:00

commit c314c9f15aa5f43f0e5c0e2602cc65798dbd1598 upstream.

On some SoC there are no simple mapping of pins to bias register bits
and a lookup table is needed. This logic is already implemented in some
SoC specific drivers that could benefit from a generic implementation.

Add helpers to deal with the lookup which later can be used by the SoC
specific drivers. The logic used to lookup are different from the one it
aims to replace, this is intentional. This new method reduces the memory
consumption at the cost of increased CPU usage and fix a bug where a
WARN() would incorrectly be triggered if the register offset is 0.

Signed-off-by: Niklas Söderlund 
Reviewed-by: Laurent Pinchart 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Greg Kroah-Hartman

pinctrl: sh-pfc: r8a7795: Use lookup function for bias data

2017-01-19T19:17:57+00:00

commit d3b861bccdee2fa9963a2b6c64f74a8d752b9315 upstream.

There is a bug in the r8a7795 bias code where a WARN() is trigged
anytime a pin from PUEN0/PUD0 is accessed.

 # cat /sys/kernel/debug/pinctrl/e6060000.pfc/pinconf-pins

 WARNING: CPU: 2 PID: 2391 at drivers/pinctrl/sh-pfc/pfc-r8a7795.c:5364 r8a7795_pinmux_get_bias+0xbc/0xc8
 [..]
 Call trace:
 [] r8a7795_pinmux_get_bias+0xbc/0xc8
 [] sh_pfc_pinconf_get+0x194/0x270
 [] pin_config_get_for_pin+0x20/0x30
 [] pinconf_generic_dump_one+0x168/0x188
 [] pinconf_generic_dump_pins+0x5c/0x98
 [] pinconf_pins_show+0xc8/0x128
 [] seq_read+0x16c/0x420
 [] full_proxy_read+0x58/0x88
 [] __vfs_read+0x1c/0xf8
 [] vfs_read+0x84/0x148
 [] SyS_read+0x44/0xa0
 [] __sys_trace_return+0x0/0x4

This is due to the WARN() check if the reg field of the pullups struct
is zero, and this should be 0 for pins controlled by the PUEN0/PUD0
registers since PU0 is defined as 0. Change the data structure and use
the generic sh_pfc_pin_to_bias_info() function to get the register
offset and bit information.

Fixes: 560655247b627ac7 ("pinctrl: sh-pfc: r8a7795: Add bias pinconf support")
Signed-off-by: Niklas Söderlund 
Reviewed-by: Laurent Pinchart 
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Greg Kroah-Hartman

pinctrl: sh-pfc: r8a7794: Implement voltage switching for SDHI

2016-09-14T07:26:54+00:00

All the SHDIs can operate with either 3.3V or 1.8V signals, depending
on negotiation with the card.

Based on work by Wolfram Sang for the r8a7790.

Signed-off-by: Simon Horman 
Acked-by: Wolfram Sang 
Acked-by: Linus Walleij 
Signed-off-by: Geert Uytterhoeven

pinctrl: sh-pfc: r8a7791: Implement voltage switching for SDHI

2016-09-14T07:26:49+00:00

All the SHDIs can operate with either 3.3V or 1.8V signals, depending
on negotiation with the card.

Based on work by Wolfram Sang for the r8a7790.

Signed-off-by: Simon Horman 
Acked-by: Wolfram Sang 
Acked-by: Linus Walleij 
Signed-off-by: Geert Uytterhoeven

pinctrl: sh-pfc: Add PORT_GP_24 helper macro

2016-09-14T07:26:35+00:00

This follows the style of existing PORT_GP_X macros and
will be used by a follow-up patch for the r8a7791 SoC.

Signed-off-by: Simon Horman 
Acked-by: Linus Walleij 
Signed-off-by: Geert Uytterhoeven

pinctrl: sh-pfc: r8a7796: Add voltage switch operations for SDHI

2016-09-12T08:58:23+00:00

This patch supports the {get,set}_io_voltage operations of SDHI.

This operates the POCCTRL0 register on R8A7796 SoC and makes 1.8v/3.3v
voltage switch.

Based on work by Takeshi Kihara and Wolfram Sang.

Cc: Takeshi Kihara 
Signed-off-by: Simon Horman 
Reviewed-by: Wolfram Sang 
Signed-off-by: Geert Uytterhoeven

pinctrl: sh-pfc: Return pinconf with arguments in packed format

2016-09-12T08:58:23+00:00

The pinconf-generic code expects configurations with arguments to be
returned in a packed format in order to be displayed properly by
pinconf_generic_dump_one().

Reading /sys/kernel/debug/pinctrl/e6060000.pfc/pinconf-pins on
r8a7795/salvator-x now shows:

    pin 101 (GP_3_5): output drive strength (9 mA), pin power source (3300 selector)

Instead of:

    pin 101 (GP_3_5): output drive strength (0 mA), pin power source (0 selector)

Signed-off-by: Niklas Söderlund 
Tested-by: Geert Uytterhoeven 
Signed-off-by: Geert Uytterhoeven

pinctrl: sh-pfc: r8a7792: Add MSIOF pin groups

2016-09-12T08:54:35+00:00

Add MSIOF0/1 pin groups to the R8A7792 PFC driver.

Based  on the original (and large) patch by Vladimir Barinov
.

Signed-off-by: Sergei Shtylyov 
Signed-off-by: Geert Uytterhoeven

pinctrl: sh-pfc: r8a7792: Add QSPI pin groups

2016-09-12T08:54:30+00:00

Add QSPI pin groups to the R8A7792 PFC driver.

Based  on the original (and large) patch by Vladimir Barinov
.

Signed-off-by: Sergei Shtylyov 
Acked-by: Linus Walleij 
Signed-off-by: Geert Uytterhoeven