linux-toradex.git/drivers/pinctrl/sh-pfc, branch v5.0

pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length

2018-12-18T10:25:56+00:00

pinmux_cfg_reg.var_field_width[] is actually a variable-length array,
terminated by a zero, and counting at most r_width entries.
Usually the number of entries is much smaller than r_width, so the
ability to catch bugs at compile time through an "excess elements in
array initializer" warning is fairly limited.

Hence make the array variable-length, decreasing kernel size slightly.

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Simon Horman

pinctrl: sh-pfc: Print actual field width for variable-width fields

2018-12-18T10:25:56+00:00

The debug code in sh_pfc_write_config_reg() prints the width of the
field being modified.

However, registers with a variable-width field layout are identified by
pinmux_cfg_reg.field_width being zero, hence zeroes are printed instead
of the actual field widths.

Fix this by printing the Hamming weight of the field mask instead, which
is correct for both fixed-width and variable-width fields.

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Simon Horman

pinctrl: sh-pfc: sh7734: Fix shifted values in IPSR10

2018-12-18T10:25:56+00:00

Some values in the Peripheral Function Select Register 10 descriptor are
shifted by one position, which may cause a peripheral function to be
programmed incorrectly.

Fixing this makes all HSCIF0 pins use Function 4 (value 3), like was
already the case for the HSCK0 pin in field IP10[5:3].

Fixes: ac1ebc2190f575fc ("sh-pfc: Add sh7734 pinmux support")
Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Simon Horman

pinctrl: sh-pfc: sh7734: Remove bogus IPSR10 value

2018-12-18T10:25:56+00:00

The IP10[5:3] field in Peripheral Function Select Register 10 has a
width of 3 bits, i.e. it allows programming one out of 8 different
configurations.
However, 9 values are provided instead of 8, overflowing into the
subsequent field in the register, and thus breaking the configuration of
the latter.

Fix this by dropping a bogus zero value.

Fixes: ac1ebc2190f575fc ("sh-pfc: Add sh7734 pinmux support")
Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Simon Horman

pinctrl: sh-pfc: sh7269: Add missing PCIOR0 field

2018-12-18T10:25:56+00:00

The Port C I/O Register 0 contains 7 reserved bits, but the descriptor
contains only dummy configuration values for 6 reserved bits, thus
breaking the configuration of all subsequent fields in the register.

Fix this by adding the two missing configuration values.

Fixes: f5e811f2a43117b2 ("sh-pfc: Add sh7269 pinmux support")
Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Simon Horman

pinctrl: sh-pfc: sh7264: Fix PFCR3 and PFCR0 register configuration

2018-12-18T10:25:56+00:00

The Port F Control Register 3 (PFCR3) contains only a single field.
However, counting from left to right, it is the fourth field, not the
first field.
Insert the missing dummy configuration values (3 fields of 16 values) to
fix this.

The descriptor for the Port F Control Register 0 (PFCR0) lacks the
description for the 4th field (PF0 Mode, PF0MD[2:0]).
Add the missing configuration values to fix this.

Fixes: a8d42fc4217b1ea1 ("sh-pfc: Add sh7264 pinmux support")
Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Simon Horman

pinctrl: sh-pfc: r8a77995: Remove bogus SEL_PWM[0-3]_3 configurations

2018-12-18T10:25:56+00:00

While the SEL_PWM[0-3] fields in the Module Select Register 0 support 4
possible configurations per PWM pin, only the first 3 are valid.

Replace the invalid and unused configurations for SEL_PWM[0-3]_3 by
dummies.

Fixes: 794a6711764658a1 ("pinctrl: sh-pfc: Initial R8A77995 PFC support")
Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Simon Horman

pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 SEL_I2C1 field width

2018-12-18T10:25:56+00:00

The SEL_I2C1 (MOD_SEL0[21:20]) field in Module Select Register 0 has a
width of 2 bits, i.e. it allows programming one out of 4 different
configurations.
However, the MOD_SEL0_21_20 macro contains 8 values instead of 4,
overflowing into the subsequent fields in the register, and thus breaking
the configuration of the latter.

Fix this by dropping the bogus last 4 values, including the non-existent
SEL_I2C1_4 configuration.

Fixes: 6d4036a1e3b3ac0f ("pinctrl: sh-pfc: Initial R8A77990 PFC support")
Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Simon Horman

pinctrl: sh-pfc: sh7734: Add missing IPSR11 field

2018-12-18T10:25:56+00:00

The Peripheral Function Select Register 11 contains 3 reserved bits and
15 variable-width fields, but the variable field descriptor does not
contain the 3-bit field IP11[25:23].

Fixes: 856cb4bb337ee504 ("sh: Add support pinmux for SH7734")
Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Simon Horman

pinctrl: sh-pfc: r8a77980: Add missing MOD_SEL0 field

2018-12-18T10:25:56+00:00

The Module Select Register 0 contains 20 (= 5 x 4) reserved bits, and 12
single-bit fields, but the variable field descriptor lacks a field of 4
reserved bits.

Fixes: f59125248a691dfe ("pinctrl: sh-pfc: Add R8A77980 PFC support")
Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Simon Horman