SG2044 share the share common control logic with SG2042. So
only pin definition is needed.

Add pin definition driver for SG2044 SoC.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-8-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add base driver for SG2042 SoC and pin definition.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-7-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Since different series of the Sophgo chip share a common pinctrl data
structure. It is necessary to add a common probe function to alloc
the this data structure. Add pctrl_init callback to allow soc to perform
its own initialization.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-5-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

With generic data structure, it is possible to generalize vddio
operators and DT parsing code of cv18xx pinctrl driver. Introduce
sophgo_cfg_ops callback to allow the driver to adjust the soc
logic and share common code.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-4-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

To share DT parsing and vddio code, it is necessary to introduce
some generic data structure to abstract the different cv18xx series
and the incoming sg2042 series.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-3-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

When setting pinconf configuration for cv1800 SoC, the driver just writes
the value. It may zero some bits of the pinconf register and cause some
unexpected error. Add a mask to avoid this.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-2-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Pull pin control updates from Linus Walleij:
 "No core changes this time.

  New drivers:

   - Xlinix Versal pin control driver

   - Ocelot LAN969x pin control driver

   - T-Head TH1520 RISC-V SoC pin control driver

   - Qualcomm SM8750, IPQ5424, QCS8300, SAR2130P and QCS615 SoC pin
     control drivers

   - Qualcomm SM8750 LPASS (low power audio subsystem) pin control
     driver

   - Qualcomm PM8937 mixsig IC pin control support, GPIO and MPP
     (multi-purpose-pin)

   - Samsung Exynos8895 and Exynos9810 SoC pin control driver

   - SpacemiT K1 SoC pin control driver

   - Airhoa EN7581 IC pin control driver

  Improvements:

   - The Renesas subdriver now supports schmitt-trigger and open drain
     pin configurations if the hardware supports it

   - Support GPIOF and GPIOG banks in the Aspeed G6 SoC

   - Support the DSW community in the Intel Elkhartlake SoC"

* tag 'pinctrl-v6.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (105 commits)
  pinctrl: airoha: Use unsigned long for bit search
  pinctrl: k210: Undef K210_PC_DEFAULT
  pinctrl: qcom: spmi: fix debugfs drive strength
  pinctrl: qcom: Add sm8750 pinctrl driver
  dt-bindings: pinctrl: qcom: Add sm8750 pinctrl
  pinctrl: cy8c95x0: remove unneeded goto labels
  pinctrl: cy8c95x0: embed iterator to the for-loop
  pinctrl: cy8c95x0: Use temporary variable for struct device
  pinctrl: cy8c95x0: use flexible sleeping in reset function
  pinctrl: cy8c95x0: switch to using devm_regulator_get_enable()
  pinctrl: cy8c95x0: Use 2-argument strscpy()
  dt-bindings: pinctrl: sx150xq: allow gpio line naming
  pinctrl: single: add marvell,pxa1908-padconf compatible
  dt-bindings: pinctrl: pinctrl-single: add marvell,pxa1908-padconf compatible
  dt-bindings: pinctrl: correct typo of description for cv1800
  pinctrl: qcom: spmi-mpp: Add PM8937 compatible
  dt-bindings: pinctrl: qcom,pmic-mpp: Document PM8937 compatible
  pinctrl: qcom-pmic-gpio: add support for PM8937
  dt-bindings: pinctrl: qcom,pmic-gpio: add PM8937
  pinctrl: Use of_property_present() for non-boolean properties
  ...

Fix typo in tristate definition of the SG2002 Pinctrl driver.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Link: https://lore.kernel.org/20241016-typo-pinctrl-sg2002-v1-1-2bdacb2d41e3@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

'map' is allocated using devm_* which takes care of freeing the allocated
data, but in error paths there is a call to pinctrl_utils_free_map()
which also does kfree(map) which leads to a double free.

Use kcalloc() instead of devm_kcalloc() as freeing is manually handled.

Fixes: a29d8e93e710 ("pinctrl: sophgo: add support for CV1800B SoC")
Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com>
Link: https://lore.kernel.org/20241010111830.3474719-1-harshit.m.mogalapalli@oracle.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

As the variable reg in "cv1800_pctrl_dbg_show" misses a "__iomem"
type identifier, a warning will be issued by the compiler. Add
this identifier to avoid this warning.

Fixes: a29d8e93e710 ("pinctrl: sophgo: add support for CV1800B SoC")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202408271555.kpOmi9I8-lkp@intel.com/
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/IA1PR20MB495329EBE498DFFDAA1EC457BB972@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>