linux-toradex.git/drivers/pinctrl, branch v3.7.3 Linux kernel for Apalis and Colibri modules pinctrl/samsung: don't allow enabling pinctrl-samsung standalone 2012-11-15T10:58:24+00:00 Arnd Bergmann arnd@arndb.de 2012-11-15T10:58:24+00:00 cbc351abe3c9bcec11c712dd41bb212748fd46d3 The main samsung pinctrl module references the specific exynos4210 pinctrl driver, which selects the main driver in Kconfig. Making the main driver a silent "bool" option avoid this potential build error if CONFIG_PINCTRL_SAMSUNG=y && CONFIG_PINCTRL_EXYNOS4=n: drivers/built-in.o:(.rodata+0x4e4): undefined reference to `exynos4210_pin_ctrl' Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The main samsung pinctrl module references the specific exynos4210
pinctrl driver, which selects the main driver in Kconfig.

Making the main driver a silent "bool" option avoid this potential
build error if CONFIG_PINCTRL_SAMSUNG=y && CONFIG_PINCTRL_EXYNOS4=n:

drivers/built-in.o:(.rodata+0x4e4): undefined reference to `exynos4210_pin_ctrl'

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: samsung and exynos need to depend on OF && GPIOLIB 2012-11-06T09:02:14+00:00 Axel Lin axel.lin@ingics.com 2012-11-06T07:04:30+00:00 924da31416f20a8ee7a9008dd4e6e6054bc36b1b This patch fixes below build error when !CONFIG_OF_GPIO. CC drivers/pinctrl/pinctrl-samsung.o drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_pinctrl_parse_dt_pins': drivers/pinctrl/pinctrl-samsung.c:557:19: warning: unused variable 'prop' [-Wunused-variable] drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_gpiolib_register': drivers/pinctrl/pinctrl-samsung.c:797:5: error: 'struct gpio_chip' has no member named 'of_node' make[2]: *** [drivers/pinctrl/pinctrl-samsung.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make: *** [drivers] Error 2 The samsung pinctrl driver supports only device tree enabled platforms. Thus make PINCTRL_SAMSUNG depend on OF && GPIOLIB. The reason to depend on GPIOLIB is CONFIG_OF_GPIO only available when GPIOLIB is selected. Since PINCTRL_EXYNOS4 select PINCTRL_SAMSUNG, thus also make PINCTRL_EXYNOS4 depend on OF && GPIOLIB. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
This patch fixes below build error when !CONFIG_OF_GPIO.

  CC      drivers/pinctrl/pinctrl-samsung.o
drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_pinctrl_parse_dt_pins':
drivers/pinctrl/pinctrl-samsung.c:557:19: warning: unused variable 'prop' [-Wunused-variable]
drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_gpiolib_register':
drivers/pinctrl/pinctrl-samsung.c:797:5: error: 'struct gpio_chip' has no member named 'of_node'
make[2]: *** [drivers/pinctrl/pinctrl-samsung.o] Error 1
make[1]: *** [drivers/pinctrl] Error 2
make: *** [drivers] Error 2

The samsung pinctrl driver supports only device tree enabled
platforms. Thus make PINCTRL_SAMSUNG depend on OF && GPIOLIB.

The reason to depend on GPIOLIB is CONFIG_OF_GPIO only available
when GPIOLIB is selected.

Since PINCTRL_EXYNOS4 select PINCTRL_SAMSUNG, thus also make
PINCTRL_EXYNOS4 depend on OF && GPIOLIB.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: SPEAr1340: Add clcd sleep mode pin configuration 2012-11-05T11:34:32+00:00 Vipul Kumar Samar vipulkumar.samar@st.com 2012-10-27T09:17:54+00:00 0504271c8dfe2247401de4f153e9224535e622c2 CLCD pads must be configured differently for sleep mode. This patch adds support for clcd_sleep_pingroup. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
CLCD pads must be configured differently for sleep mode. This patch adds support
for clcd_sleep_pingroup.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: SPEAr1340: Make DDR reset & clock pads as gpio 2012-11-05T11:34:26+00:00 Deepak Sikri deepak.sikri@st.com 2012-10-27T09:17:53+00:00 35d14806948f0e97e86c3199489ff6a826df1a3c Some gpio pins are used to control DDR reset and clock enable while the system is moved into Low power. This patch adds in the corresponding GPIO entries in the pads_as_gpio_pins to ensure the pads are available as gpio's. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Some gpio pins are used to control DDR reset and clock enable while the system
is moved into Low power. This patch adds in the corresponding GPIO entries in
the pads_as_gpio_pins to ensure the pads are available as gpio's.

Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: SPEAr1310: add register entries for enabling pad direction 2012-11-05T11:34:23+00:00 Shiraz Hashim shiraz.hashim@st.com 2012-10-27T09:17:52+00:00 0e6f1e5c39ac456d692be77d3adeb4fd7d905d27 Pad direction must also be updated for SPEAr1310, while setting pads values. This patch adds support for that. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Pad direction must also be updated for SPEAr1310, while setting pads values.
This patch adds support for that.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: SPEAr1310: Separate out pci pins from pcie_sata pin group 2012-11-05T11:34:20+00:00 Vipul Kumar Samar vipulkumar.samar@st.com 2012-10-27T09:17:51+00:00 f7c5b3d574a036e401b8ccf7ee93b873561c09e4 SPEAr1310 has separate PCI and PCIe implementations which are not muxed with each other. Presently they have been implemented as muxed together with SATA and are represented wrongly in the software. In reality only PCIe and SATA implementations are muxed with each other. This patch separates out pci pins creating a new pingroup and function for pci. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
SPEAr1310 has separate PCI and PCIe implementations which are not muxed with
each other. Presently they have been implemented as muxed together with SATA and
are represented wrongly in the software.

In reality only PCIe and SATA implementations are muxed with each other. This
patch separates out pci pins creating a new pingroup and function for pci.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: SPEAr1310: Fix value of PERIP_CFG reigster and MCIF_SEL_SHIFT 2012-11-05T11:33:57+00:00 Vipul Kumar Samar vipulkumar.samar@st.com 2012-10-27T09:17:50+00:00 82a2deb93cb2237e3a91db6d0317571ecbd6e531 This patch fixes two macros: PERIP_CFG registers offset and MCIF selection shift. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
This patch fixes two macros: PERIP_CFG registers offset and MCIF selection
shift.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: SPEAr1310: fix clcd high resolution pin group name 2012-11-05T11:33:46+00:00 Shiraz Hashim shiraz.hashim@st.com 2012-10-27T09:17:49+00:00 b06fbfdb06da61154b9498ff8e83377d3d795081 All group names in SPEAr pinctrl have "_grp" at the end of their name. Do the same for clcd_high_res_grp. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
All group names in SPEAr pinctrl have "_grp" at the end of their name. Do the
same for clcd_high_res_grp.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: SPEAr320: Correct pad mux entries for rmii/smii 2012-11-05T11:33:41+00:00 Deepak Sikri deepak.sikri@st.com 2012-10-27T09:17:48+00:00 b06bf9a905e1d9ebb7326fa4110cf5eb105c872f pin entries of rmii and smii are interchanged by mistake. Fix it. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
pin entries of rmii and smii are interchanged by mistake. Fix it.

Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: SPEAr3xx: correct register space to configure pwm 2012-11-05T11:33:37+00:00 Shiraz Hashim shiraz.hashim@st.com 2012-10-27T09:17:47+00:00 a778005589918c8051c496d8b7c96037776ed239 To have pwm on pad no. 34 we also need to select between pwm and SD_LED functions. Add this to pwm pin mux register configuration. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
To have pwm on pad no. 34 we also need to select between pwm and SD_LED
functions. Add this to pwm pin mux register configuration.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>