<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/pinctrl, branch v6.19</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge tag 'gpio-fixes-for-v6.19-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux</title>
<updated>2026-01-30T19:58:27+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-01-30T19:58:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d941a3f65605113db18d1485d65f0e175238beea'/>
<id>d941a3f65605113db18d1485d65f0e175238beea</id>
<content type='text'>
Pull gpio fixes from Bartosz Golaszewski:
 "Over the last week I received quite an unexpected (for rc7) number of
  fixes but they are all pretty small and mostly limited to drivers:

   - don't call into pinctrl when setting direction in gpio-rockchip as
     it's not needed and may trigger locking context errors

   - change spinlock to raw_spinlock in gpio-sprd

   - fix a use-after-free bug in gpio-virtuser

   - don't register a driver from another driver's probe() in gpio-omap

   - fix int width problems in GPIO ACPI code

   - fix interrupt-to-pin mapping in gpio-brcmstb

   - mask interrupts in irq shutdown in gpio-pca953x"

* tag 'gpio-fixes-for-v6.19-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  gpiolib: acpi: Fix potential out-of-boundary left shift
  gpio: brcmstb: correct hwirq to bank map
  gpio: omap: do not register driver in probe()
  gpio: pca953x: mask interrupts in irq shutdown
  gpio: virtuser: fix UAF in configfs release path
  gpiolib: acpi: use BIT_ULL() for u64 mask in address space handler
  gpio: sprd: Change sprd_gpio lock to raw_spin_lock
  gpio: rockchip: Stop calling pinctrl for set_direction
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull gpio fixes from Bartosz Golaszewski:
 "Over the last week I received quite an unexpected (for rc7) number of
  fixes but they are all pretty small and mostly limited to drivers:

   - don't call into pinctrl when setting direction in gpio-rockchip as
     it's not needed and may trigger locking context errors

   - change spinlock to raw_spinlock in gpio-sprd

   - fix a use-after-free bug in gpio-virtuser

   - don't register a driver from another driver's probe() in gpio-omap

   - fix int width problems in GPIO ACPI code

   - fix interrupt-to-pin mapping in gpio-brcmstb

   - mask interrupts in irq shutdown in gpio-pca953x"

* tag 'gpio-fixes-for-v6.19-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  gpiolib: acpi: Fix potential out-of-boundary left shift
  gpio: brcmstb: correct hwirq to bank map
  gpio: omap: do not register driver in probe()
  gpio: pca953x: mask interrupts in irq shutdown
  gpio: virtuser: fix UAF in configfs release path
  gpiolib: acpi: use BIT_ULL() for u64 mask in address space handler
  gpio: sprd: Change sprd_gpio lock to raw_spin_lock
  gpio: rockchip: Stop calling pinctrl for set_direction
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: lpass-lpi: implement .get_direction() for the GPIO driver</title>
<updated>2026-01-27T09:06:27+00:00</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@oss.qualcomm.com</email>
</author>
<published>2026-01-26T13:56:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4f0d22ec60cee420125f4055af76caa0f373a3fe'/>
<id>4f0d22ec60cee420125f4055af76caa0f373a3fe</id>
<content type='text'>
GPIO controller driver should typically implement the .get_direction()
callback as GPIOLIB internals may try to use it to determine the state
of a pin. Add it for the LPASS LPI driver.

Reported-by: Abel Vesa &lt;abelvesa@kernel.org&gt;
Cc: stable@vger.kernel.org
Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Tested-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt; # X1E CRD
Tested-by: Abel Vesa &lt;abel.vesa@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
GPIO controller driver should typically implement the .get_direction()
callback as GPIOLIB internals may try to use it to determine the state
of a pin. Add it for the LPASS LPI driver.

Reported-by: Abel Vesa &lt;abelvesa@kernel.org&gt;
Cc: stable@vger.kernel.org
Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Tested-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt; # X1E CRD
Tested-by: Abel Vesa &lt;abel.vesa@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: rockchip: Stop calling pinctrl for set_direction</title>
<updated>2026-01-27T09:02:38+00:00</updated>
<author>
<name>Robin Murphy</name>
<email>robin.murphy@arm.com</email>
</author>
<published>2026-01-26T12:12:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7ca497be00163610afb663867db24ac408752f13'/>
<id>7ca497be00163610afb663867db24ac408752f13</id>
<content type='text'>
Marking the whole controller as sleeping due to the pinctrl calls in the
.direction_{input,output} callbacks has the unfortunate side effect that
legitimate invocations of .get and .set, which cannot themselves sleep,
in atomic context now spew WARN()s from gpiolib.

However, as Heiko points out, the driver doing this is a bit silly to
begin with, as the pinctrl .gpio_set_direction hook doesn't even care
about the direction, the hook is only used to claim the mux. And sure
enough, the .gpio_request_enable hook exists to serve this very purpose,
so switch to that and remove the problematic business entirely.

Cc: stable@vger.kernel.org
Fixes: 20cf2aed89ac ("gpio: rockchip: mark the GPIO controller as sleeping")
Suggested-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://lore.kernel.org/r/bddc0469f25843ca5ae0cf578ab3671435ae98a7.1769429546.git.robin.murphy@arm.com
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Marking the whole controller as sleeping due to the pinctrl calls in the
.direction_{input,output} callbacks has the unfortunate side effect that
legitimate invocations of .get and .set, which cannot themselves sleep,
in atomic context now spew WARN()s from gpiolib.

However, as Heiko points out, the driver doing this is a bit silly to
begin with, as the pinctrl .gpio_set_direction hook doesn't even care
about the direction, the hook is only used to claim the mux. And sure
enough, the .gpio_request_enable hook exists to serve this very purpose,
so switch to that and remove the problematic business entirely.

Cc: stable@vger.kernel.org
Fixes: 20cf2aed89ac ("gpio: rockchip: mark the GPIO controller as sleeping")
Suggested-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://lore.kernel.org/r/bddc0469f25843ca5ae0cf578ab3671435ae98a7.1769429546.git.robin.murphy@arm.com
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: th1520: Fix typo</title>
<updated>2026-01-20T08:59:26+00:00</updated>
<author>
<name>Thomas Gerner</name>
<email>thomas.gerner@muenchen-mail.de</email>
</author>
<published>2026-01-20T08:59:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=304c3ebcaff36560d76e3030ba0839e629635f47'/>
<id>304c3ebcaff36560d76e3030ba0839e629635f47</id>
<content type='text'>
This fixes a simple typo in the TH1520 SPI0 for group3 pins:
QSPI0 is misspelled QSPI1.

Signed-off-by: Thomas Gerner &lt;thomas.gerner@muenchen-mail.de&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This fixes a simple typo in the TH1520 SPI0 for group3 pins:
QSPI0 is misspelled QSPI1.

Signed-off-by: Thomas Gerner &lt;thomas.gerner@muenchen-mail.de&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: sm8350-lpass-lpi: Merge with SC7280 to fix I2S2 and SWR TX pins</title>
<updated>2026-01-19T00:13:22+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-01-08T10:07:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1fbe3abb449c5ef2178e1c3e3e8b9a43a7a410ac'/>
<id>1fbe3abb449c5ef2178e1c3e3e8b9a43a7a410ac</id>
<content type='text'>
Qualcomm SC7280 and SM8350 SoCs have slightly different LPASS audio
blocks (v9.4.5 and v9.2), however the LPASS LPI pin controllers are
exactly the same.  The driver for SM8350 has two issues, which can be
fixed by simply moving over to SC7280 driver which has them correct:

1. "i2s2_data_groups" listed twice GPIO12, but should have both GPIO12
   and GPIO13,

2. "swr_tx_data_groups" contained GPIO5 for "swr_tx_data2" function, but
   that function is also available on GPIO14, thus listing it twice is
   not necessary.  OTOH, GPIO5 has also "swr_rx_data1", so selecting
   swr_rx_data function should not block  the TX one.

Fixes: be9f6d56381d ("pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM")
Cc: stable@vger.kernel.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Qualcomm SC7280 and SM8350 SoCs have slightly different LPASS audio
blocks (v9.4.5 and v9.2), however the LPASS LPI pin controllers are
exactly the same.  The driver for SM8350 has two issues, which can be
fixed by simply moving over to SC7280 driver which has them correct:

1. "i2s2_data_groups" listed twice GPIO12, but should have both GPIO12
   and GPIO13,

2. "swr_tx_data_groups" contained GPIO5 for "swr_tx_data2" function, but
   that function is also available on GPIO14, thus listing it twice is
   not necessary.  OTOH, GPIO5 has also "swr_rx_data1", so selecting
   swr_rx_data function should not block  the TX one.

Fixes: be9f6d56381d ("pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM")
Cc: stable@vger.kernel.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: meson: mark the GPIO controller as sleeping</title>
<updated>2026-01-19T00:13:22+00:00</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@oss.qualcomm.com</email>
</author>
<published>2026-01-05T15:05:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=28f24068387169722b508bba6b5257cb68b86e74'/>
<id>28f24068387169722b508bba6b5257cb68b86e74</id>
<content type='text'>
The GPIO controller is configured as non-sleeping but it uses generic
pinctrl helpers which use a mutex for synchronization.

This can cause the following lockdep splat with shared GPIOs enabled on
boards which have multiple devices using the same GPIO:

BUG: sleeping function called from invalid context at
kernel/locking/mutex.c:591
in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 142, name:
kworker/u25:3
preempt_count: 1, expected: 0
RCU nest depth: 0, expected: 0
INFO: lockdep is turned off.
irq event stamp: 46379
hardirqs last  enabled at (46379): [&lt;ffff8000813acb24&gt;]
_raw_spin_unlock_irqrestore+0x74/0x78
hardirqs last disabled at (46378): [&lt;ffff8000813abf38&gt;]
_raw_spin_lock_irqsave+0x84/0x88
softirqs last  enabled at (46330): [&lt;ffff8000800c71b4&gt;]
handle_softirqs+0x4c4/0x4dc
softirqs last disabled at (46295): [&lt;ffff800080010674&gt;]
__do_softirq+0x14/0x20
CPU: 1 UID: 0 PID: 142 Comm: kworker/u25:3 Tainted: G C
6.19.0-rc4-next-20260105+ #11963 PREEMPT
Tainted: [C]=CRAP
Hardware name: Khadas VIM3 (DT)
Workqueue: events_unbound deferred_probe_work_func
Call trace:
  show_stack+0x18/0x24 (C)
  dump_stack_lvl+0x90/0xd0
  dump_stack+0x18/0x24
  __might_resched+0x144/0x248
  __might_sleep+0x48/0x98
  __mutex_lock+0x5c/0x894
  mutex_lock_nested+0x24/0x30
  pinctrl_get_device_gpio_range+0x44/0x128
  pinctrl_gpio_set_config+0x40/0xdc
  gpiochip_generic_config+0x28/0x3c
  gpio_do_set_config+0xa8/0x194
  gpiod_set_config+0x34/0xfc
  gpio_shared_proxy_set_config+0x6c/0xfc [gpio_shared_proxy]
  gpio_do_set_config+0xa8/0x194
  gpiod_set_transitory+0x4c/0xf0
  gpiod_configure_flags+0xa4/0x480
  gpiod_find_and_request+0x1a0/0x574
  gpiod_get_index+0x58/0x84
  devm_gpiod_get_index+0x20/0xb4
  devm_gpiod_get+0x18/0x24
  mmc_pwrseq_emmc_probe+0x40/0xb8
  platform_probe+0x5c/0xac
  really_probe+0xbc/0x298
  __driver_probe_device+0x78/0x12c
  driver_probe_device+0xdc/0x164
  __device_attach_driver+0xb8/0x138
  bus_for_each_drv+0x80/0xdc
  __device_attach+0xa8/0x1b0

Fixes: 6ac730951104 ("pinctrl: add driver for Amlogic Meson SoCs")
Cc: stable@vger.kernel.org
Reported-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Closes: https://lore.kernel.org/all/00107523-7737-4b92-a785-14ce4e93b8cb@samsung.com/
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Reviewed-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The GPIO controller is configured as non-sleeping but it uses generic
pinctrl helpers which use a mutex for synchronization.

This can cause the following lockdep splat with shared GPIOs enabled on
boards which have multiple devices using the same GPIO:

BUG: sleeping function called from invalid context at
kernel/locking/mutex.c:591
in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 142, name:
kworker/u25:3
preempt_count: 1, expected: 0
RCU nest depth: 0, expected: 0
INFO: lockdep is turned off.
irq event stamp: 46379
hardirqs last  enabled at (46379): [&lt;ffff8000813acb24&gt;]
_raw_spin_unlock_irqrestore+0x74/0x78
hardirqs last disabled at (46378): [&lt;ffff8000813abf38&gt;]
_raw_spin_lock_irqsave+0x84/0x88
softirqs last  enabled at (46330): [&lt;ffff8000800c71b4&gt;]
handle_softirqs+0x4c4/0x4dc
softirqs last disabled at (46295): [&lt;ffff800080010674&gt;]
__do_softirq+0x14/0x20
CPU: 1 UID: 0 PID: 142 Comm: kworker/u25:3 Tainted: G C
6.19.0-rc4-next-20260105+ #11963 PREEMPT
Tainted: [C]=CRAP
Hardware name: Khadas VIM3 (DT)
Workqueue: events_unbound deferred_probe_work_func
Call trace:
  show_stack+0x18/0x24 (C)
  dump_stack_lvl+0x90/0xd0
  dump_stack+0x18/0x24
  __might_resched+0x144/0x248
  __might_sleep+0x48/0x98
  __mutex_lock+0x5c/0x894
  mutex_lock_nested+0x24/0x30
  pinctrl_get_device_gpio_range+0x44/0x128
  pinctrl_gpio_set_config+0x40/0xdc
  gpiochip_generic_config+0x28/0x3c
  gpio_do_set_config+0xa8/0x194
  gpiod_set_config+0x34/0xfc
  gpio_shared_proxy_set_config+0x6c/0xfc [gpio_shared_proxy]
  gpio_do_set_config+0xa8/0x194
  gpiod_set_transitory+0x4c/0xf0
  gpiod_configure_flags+0xa4/0x480
  gpiod_find_and_request+0x1a0/0x574
  gpiod_get_index+0x58/0x84
  devm_gpiod_get_index+0x20/0xb4
  devm_gpiod_get+0x18/0x24
  mmc_pwrseq_emmc_probe+0x40/0xb8
  platform_probe+0x5c/0xac
  really_probe+0xbc/0x298
  __driver_probe_device+0x78/0x12c
  driver_probe_device+0xdc/0x164
  __device_attach_driver+0xb8/0x138
  bus_for_each_drv+0x80/0xdc
  __device_attach+0xa8/0x1b0

Fixes: 6ac730951104 ("pinctrl: add driver for Amlogic Meson SoCs")
Cc: stable@vger.kernel.org
Reported-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Closes: https://lore.kernel.org/all/00107523-7737-4b92-a785-14ce4e93b8cb@samsung.com/
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Reviewed-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: lpass-lpi: mark the GPIO controller as sleeping</title>
<updated>2026-01-01T14:40:56+00:00</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@linaro.org</email>
</author>
<published>2025-11-26T12:22:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ebc18e9854e5a2b62a041fb57b216a903af45b85'/>
<id>ebc18e9854e5a2b62a041fb57b216a903af45b85</id>
<content type='text'>
The gpio_chip settings in this driver say the controller can't sleep
but it actually uses a mutex for synchronization. This triggers the
following BUG():

[    9.233659] BUG: sleeping function called from invalid context at kernel/locking/mutex.c:281
[    9.233665] in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 554, name: (udev-worker)
[    9.233669] preempt_count: 1, expected: 0
[    9.233673] RCU nest depth: 0, expected: 0
[    9.233688] Tainted: [W]=WARN
[    9.233690] Hardware name: Dell Inc. Latitude 7455/0FK7MX, BIOS 2.10.1 05/20/2025
[    9.233694] Call trace:
[    9.233696]  show_stack+0x24/0x38 (C)
[    9.233709]  dump_stack_lvl+0x40/0x88
[    9.233716]  dump_stack+0x18/0x24
[    9.233722]  __might_resched+0x148/0x160
[    9.233731]  __might_sleep+0x38/0x98
[    9.233736]  mutex_lock+0x30/0xd8
[    9.233749]  lpi_config_set+0x2e8/0x3c8 [pinctrl_lpass_lpi]
[    9.233757]  lpi_gpio_direction_output+0x58/0x90 [pinctrl_lpass_lpi]
[    9.233761]  gpiod_direction_output_raw_commit+0x110/0x428
[    9.233772]  gpiod_direction_output_nonotify+0x234/0x358
[    9.233779]  gpiod_direction_output+0x38/0xd0
[    9.233786]  gpio_shared_proxy_direction_output+0xb8/0x2a8 [gpio_shared_proxy]
[    9.233792]  gpiod_direction_output_raw_commit+0x110/0x428
[    9.233799]  gpiod_direction_output_nonotify+0x234/0x358
[    9.233806]  gpiod_configure_flags+0x2c0/0x580
[    9.233812]  gpiod_find_and_request+0x358/0x4f8
[    9.233819]  gpiod_get_index+0x7c/0x98
[    9.233826]  devm_gpiod_get+0x34/0xb0
[    9.233829]  reset_gpio_probe+0x58/0x128 [reset_gpio]
[    9.233836]  auxiliary_bus_probe+0xb0/0xf0
[    9.233845]  really_probe+0x14c/0x450
[    9.233853]  __driver_probe_device+0xb0/0x188
[    9.233858]  driver_probe_device+0x4c/0x250
[    9.233863]  __driver_attach+0xf8/0x2a0
[    9.233868]  bus_for_each_dev+0xf8/0x158
[    9.233872]  driver_attach+0x30/0x48
[    9.233876]  bus_add_driver+0x158/0x2b8
[    9.233880]  driver_register+0x74/0x118
[    9.233886]  __auxiliary_driver_register+0x94/0xe8
[    9.233893]  init_module+0x34/0xfd0 [reset_gpio]
[    9.233898]  do_one_initcall+0xec/0x300
[    9.233903]  do_init_module+0x64/0x260
[    9.233910]  load_module+0x16c4/0x1900
[    9.233915]  __arm64_sys_finit_module+0x24c/0x378
[    9.233919]  invoke_syscall+0x4c/0xe8
[    9.233925]  el0_svc_common+0x8c/0xf0
[    9.233929]  do_el0_svc+0x28/0x40
[    9.233934]  el0_svc+0x38/0x100
[    9.233938]  el0t_64_sync_handler+0x84/0x130
[    9.233943]  el0t_64_sync+0x17c/0x180

Mark the controller as sleeping.

Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
Cc: stable@vger.kernel.org
Reported-by: Val Packett &lt;val@packett.cool&gt;
Closes: https://lore.kernel.org/all/98c0f185-b0e0-49ea-896c-f3972dd011ca@packett.cool/
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The gpio_chip settings in this driver say the controller can't sleep
but it actually uses a mutex for synchronization. This triggers the
following BUG():

[    9.233659] BUG: sleeping function called from invalid context at kernel/locking/mutex.c:281
[    9.233665] in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 554, name: (udev-worker)
[    9.233669] preempt_count: 1, expected: 0
[    9.233673] RCU nest depth: 0, expected: 0
[    9.233688] Tainted: [W]=WARN
[    9.233690] Hardware name: Dell Inc. Latitude 7455/0FK7MX, BIOS 2.10.1 05/20/2025
[    9.233694] Call trace:
[    9.233696]  show_stack+0x24/0x38 (C)
[    9.233709]  dump_stack_lvl+0x40/0x88
[    9.233716]  dump_stack+0x18/0x24
[    9.233722]  __might_resched+0x148/0x160
[    9.233731]  __might_sleep+0x38/0x98
[    9.233736]  mutex_lock+0x30/0xd8
[    9.233749]  lpi_config_set+0x2e8/0x3c8 [pinctrl_lpass_lpi]
[    9.233757]  lpi_gpio_direction_output+0x58/0x90 [pinctrl_lpass_lpi]
[    9.233761]  gpiod_direction_output_raw_commit+0x110/0x428
[    9.233772]  gpiod_direction_output_nonotify+0x234/0x358
[    9.233779]  gpiod_direction_output+0x38/0xd0
[    9.233786]  gpio_shared_proxy_direction_output+0xb8/0x2a8 [gpio_shared_proxy]
[    9.233792]  gpiod_direction_output_raw_commit+0x110/0x428
[    9.233799]  gpiod_direction_output_nonotify+0x234/0x358
[    9.233806]  gpiod_configure_flags+0x2c0/0x580
[    9.233812]  gpiod_find_and_request+0x358/0x4f8
[    9.233819]  gpiod_get_index+0x7c/0x98
[    9.233826]  devm_gpiod_get+0x34/0xb0
[    9.233829]  reset_gpio_probe+0x58/0x128 [reset_gpio]
[    9.233836]  auxiliary_bus_probe+0xb0/0xf0
[    9.233845]  really_probe+0x14c/0x450
[    9.233853]  __driver_probe_device+0xb0/0x188
[    9.233858]  driver_probe_device+0x4c/0x250
[    9.233863]  __driver_attach+0xf8/0x2a0
[    9.233868]  bus_for_each_dev+0xf8/0x158
[    9.233872]  driver_attach+0x30/0x48
[    9.233876]  bus_add_driver+0x158/0x2b8
[    9.233880]  driver_register+0x74/0x118
[    9.233886]  __auxiliary_driver_register+0x94/0xe8
[    9.233893]  init_module+0x34/0xfd0 [reset_gpio]
[    9.233898]  do_one_initcall+0xec/0x300
[    9.233903]  do_init_module+0x64/0x260
[    9.233910]  load_module+0x16c4/0x1900
[    9.233915]  __arm64_sys_finit_module+0x24c/0x378
[    9.233919]  invoke_syscall+0x4c/0xe8
[    9.233925]  el0_svc_common+0x8c/0xf0
[    9.233929]  do_el0_svc+0x28/0x40
[    9.233934]  el0_svc+0x38/0x100
[    9.233938]  el0t_64_sync_handler+0x84/0x130
[    9.233943]  el0t_64_sync+0x17c/0x180

Mark the controller as sleeping.

Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
Cc: stable@vger.kernel.org
Reported-by: Val Packett &lt;val@packett.cool&gt;
Closes: https://lore.kernel.org/all/98c0f185-b0e0-49ea-896c-f3972dd011ca@packett.cool/
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: pic64gx-gpio2: Add REGMAP_MMIO dependency</title>
<updated>2026-01-01T14:33:27+00:00</updated>
<author>
<name>Sander Vanheule</name>
<email>sander@svanheule.net</email>
</author>
<published>2025-12-19T11:56:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bc277212b41ade2137b6278db24652d0847e9a91'/>
<id>bc277212b41ade2137b6278db24652d0847e9a91</id>
<content type='text'>
In line with other drivers depending on REGMAP_*, select the required
symbol to prevent a linker error when building with COMPILE_TEST=y:

ld: drivers/pinctrl/pinctrl-pic64gx-gpio2.o: in function `pic64gx_gpio2_probe':
pinctrl-pic64gx-gpio2.c:315:(.text+0x198): undefined reference to `__devm_regmap_init_mmio_clk'

Fixes: 38cf9d641314 ("pinctrl: add pic64gx "gpio2" pinmux driver")
Signed-off-by: Sander Vanheule &lt;sander@svanheule.net&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In line with other drivers depending on REGMAP_*, select the required
symbol to prevent a linker error when building with COMPILE_TEST=y:

ld: drivers/pinctrl/pinctrl-pic64gx-gpio2.o: in function `pic64gx_gpio2_probe':
pinctrl-pic64gx-gpio2.c:315:(.text+0x198): undefined reference to `__devm_regmap_init_mmio_clk'

Fixes: 38cf9d641314 ("pinctrl: add pic64gx "gpio2" pinmux driver")
Signed-off-by: Sander Vanheule &lt;sander@svanheule.net&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: mediatek: mt8189: restore previous register base name array order</title>
<updated>2025-12-26T17:45:11+00:00</updated>
<author>
<name>Louis-Alexis Eyraud</name>
<email>louisalexis.eyraud@collabora.com</email>
</author>
<published>2025-12-03T11:32:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fa917d3d570279dc3d699cbd947d0da0fde2e402'/>
<id>fa917d3d570279dc3d699cbd947d0da0fde2e402</id>
<content type='text'>
In mt8189-pinctrl driver, a previous commit changed the register base
name array (mt8189_pinctrl_register_base_names) entry name and order to
align it with the same name and order as the "mediatek,mt8189-pinctrl"
devicetree bindings. The new order (by ascending register address) now
causes an issue with MT8189 pinctrl configuration.

MT8189 SoC has multiple base addresses for the pin configuration
registers. Several constant data structures, declaring each pin
configuration, are using PIN_FIELD_BASE() macro which i_base parameter
indicates for a given pin the lookup index in the base register address
array of the driver internal data for the configuration register
read/write accesses. But in practice, this parameter is given a
hardcoded numerical value that corresponds to the expected base
register entry index in mt8189_pinctrl_register_base_names array.
Since this array reordering, the i_base index matching is no more
correct.

So, in order to avoid modifying over a thousand of PIN_FIELD_BASE()
calls, restore previous mt8189_pinctrl_register_base_names entry order.

Fixes: 518919276c41 ("pinctrl: mediatek: mt8189: align register base names to dt-bindings ones")
Signed-off-by: Louis-Alexis Eyraud &lt;louisalexis.eyraud@collabora.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In mt8189-pinctrl driver, a previous commit changed the register base
name array (mt8189_pinctrl_register_base_names) entry name and order to
align it with the same name and order as the "mediatek,mt8189-pinctrl"
devicetree bindings. The new order (by ascending register address) now
causes an issue with MT8189 pinctrl configuration.

MT8189 SoC has multiple base addresses for the pin configuration
registers. Several constant data structures, declaring each pin
configuration, are using PIN_FIELD_BASE() macro which i_base parameter
indicates for a given pin the lookup index in the base register address
array of the driver internal data for the configuration register
read/write accesses. But in practice, this parameter is given a
hardcoded numerical value that corresponds to the expected base
register entry index in mt8189_pinctrl_register_base_names array.
Since this array reordering, the i_base index matching is no more
correct.

So, in order to avoid modifying over a thousand of PIN_FIELD_BASE()
calls, restore previous mt8189_pinctrl_register_base_names entry order.

Fixes: 518919276c41 ("pinctrl: mediatek: mt8189: align register base names to dt-bindings ones")
Signed-off-by: Louis-Alexis Eyraud &lt;louisalexis.eyraud@collabora.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2025-12-08T21:45:00+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-12-08T21:45:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a110f942672c8995dc1cacb5a44c6730856743aa'/>
<id>a110f942672c8995dc1cacb5a44c6730856743aa</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "The technical details below. For me the CIX Semi and Axis
  Communications ARTPEC-9 SoCs were the most interesting new drivers in
  this merge window.

  Core changes:

   - Handle per-direction skew control in the generic pin config

   - Drop the pointless subsystem boilerplate banner message during
     boot. Less noise in the console. It's available as debug message if
     someone really want it

  New drivers:

   - Samsung Exynos 8890 SoC support

   - Samsung Exynos derived Axis Communications ARTPEC-9 SoC support.
     These guys literally live next door to me, ARTPEC spells out "Axis
     Real-Time Picture Encoding Chip" and is tailored for camera image
     streams and is something they have evolved for a quarter of a
     century

   - Mediatek MT6878 SoC support

   - Qualcomm Glymur PMIC support (mostly just compatible strings)

   - Qualcomm Kaanapali SoC TLMM support

   - Microchip pic64gx "gpio2" SoC support

   - Microchip Polarfire "iomux0" SoC support

   - CIX Semiconductors SKY1 SoC support

   - Rockchip RK3506 SoC support

   - Airhoa AN7583 chip support

  Improvements:

   - Improvements for ST Microelectronics STM32 handling of skew
     settings so input and output can have different skew settings

   - A whole bunch of device tree binding cleanups: Marvell Armada and
     Berlin, Actions Semiconductor S700 and S900, Broadcom Northstar 2
     (NS2), Bitmain BM1880 and Spreadtrum SC9860 are moved over to
     schema"

* tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
  pinctrl: add CONFIG_OF dependencies for microchip drivers
  pinctrl: starfive: use dynamic GPIO base allocation
  pinctrl: single: Fix incorrect type for error return variable
  MAINTAINERS: Change Linus Walleij mail address
  pinctrl: cix: Fix obscure dependency
  dt-bindings: pinctrl: cix,sky1-pinctrl: Drop duplicate newline
  dt-bindings: pinctrl: aspeed,ast2600-pinctrl: Add PCIe RC PERST# group
  pinctrl: airoha: Fix AIROHA_PINCTRL_CONFS_DRIVE_E2 in an7583_pinctrl_match_data
  pinctrl: airoha: fix pinctrl function mismatch issue
  pinctrl: cherryview: Convert to use intel_gpio_add_pin_ranges()
  pinctrl: intel: Export intel_gpio_add_pin_ranges()
  pinctrl: renesas: rzg2l: Refactor OEN register PWPR handling
  pinctrl: airoha: convert comma to semicolon
  pinctrl: elkhartlake: Switch to INTEL_GPP() macro
  pinctrl: cherryview: Switch to INTEL_GPP() macro
  pinctrl: emmitsburg: Switch to INTEL_GPP() macro
  pinctrl: denverton: Switch to INTEL_GPP() macro
  pinctrl: cedarfork: Switch to INTEL_GPP() macro
  pinctrl: airoha: add support for Airoha AN7583 PINs
  dt-bindings: pinctrl: airoha: Document AN7583 Pin Controller
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull pin control updates from Linus Walleij:
 "The technical details below. For me the CIX Semi and Axis
  Communications ARTPEC-9 SoCs were the most interesting new drivers in
  this merge window.

  Core changes:

   - Handle per-direction skew control in the generic pin config

   - Drop the pointless subsystem boilerplate banner message during
     boot. Less noise in the console. It's available as debug message if
     someone really want it

  New drivers:

   - Samsung Exynos 8890 SoC support

   - Samsung Exynos derived Axis Communications ARTPEC-9 SoC support.
     These guys literally live next door to me, ARTPEC spells out "Axis
     Real-Time Picture Encoding Chip" and is tailored for camera image
     streams and is something they have evolved for a quarter of a
     century

   - Mediatek MT6878 SoC support

   - Qualcomm Glymur PMIC support (mostly just compatible strings)

   - Qualcomm Kaanapali SoC TLMM support

   - Microchip pic64gx "gpio2" SoC support

   - Microchip Polarfire "iomux0" SoC support

   - CIX Semiconductors SKY1 SoC support

   - Rockchip RK3506 SoC support

   - Airhoa AN7583 chip support

  Improvements:

   - Improvements for ST Microelectronics STM32 handling of skew
     settings so input and output can have different skew settings

   - A whole bunch of device tree binding cleanups: Marvell Armada and
     Berlin, Actions Semiconductor S700 and S900, Broadcom Northstar 2
     (NS2), Bitmain BM1880 and Spreadtrum SC9860 are moved over to
     schema"

* tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
  pinctrl: add CONFIG_OF dependencies for microchip drivers
  pinctrl: starfive: use dynamic GPIO base allocation
  pinctrl: single: Fix incorrect type for error return variable
  MAINTAINERS: Change Linus Walleij mail address
  pinctrl: cix: Fix obscure dependency
  dt-bindings: pinctrl: cix,sky1-pinctrl: Drop duplicate newline
  dt-bindings: pinctrl: aspeed,ast2600-pinctrl: Add PCIe RC PERST# group
  pinctrl: airoha: Fix AIROHA_PINCTRL_CONFS_DRIVE_E2 in an7583_pinctrl_match_data
  pinctrl: airoha: fix pinctrl function mismatch issue
  pinctrl: cherryview: Convert to use intel_gpio_add_pin_ranges()
  pinctrl: intel: Export intel_gpio_add_pin_ranges()
  pinctrl: renesas: rzg2l: Refactor OEN register PWPR handling
  pinctrl: airoha: convert comma to semicolon
  pinctrl: elkhartlake: Switch to INTEL_GPP() macro
  pinctrl: cherryview: Switch to INTEL_GPP() macro
  pinctrl: emmitsburg: Switch to INTEL_GPP() macro
  pinctrl: denverton: Switch to INTEL_GPP() macro
  pinctrl: cedarfork: Switch to INTEL_GPP() macro
  pinctrl: airoha: add support for Airoha AN7583 PINs
  dt-bindings: pinctrl: airoha: Document AN7583 Pin Controller
  ...
</pre>
</div>
</content>
</entry>
</feed>
