linux-toradex.git/drivers/platform/x86/intel_mid_powerbtn.c, branch v4.18 Linux kernel for Apalis and Colibri modules platform/x86: intel_mid_powerbtn: make mid_pb_ddata const 2017-08-13T12:27:10+00:00 Bhumika Goyal bhumirks@gmail.com 2017-08-11T14:20:00+00:00 c94a8ff14de377ab8f24657b27cece4637051fe2 Make these const as they are only used during a copy operation. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 
Make these const as they are only used during a copy operation.
Done using Coccinelle.

Signed-off-by: Bhumika Goyal <bhumirks@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
platform/x86: intel_mid_powerbtn: fix error return code in mid_pb_probe() 2017-08-13T12:27:10+00:00 Gustavo A. R. Silva gustavo@embeddedor.com 2017-08-09T16:00:54+00:00 fe4e8d0910540db28e457ce792ae2b29ee66ab8a platform_get_irq() returns an error code, but the intel_mid_powerbtn driver ignores it and always returns -EINVAL. This is not correct and, prevents -EPROBE_DEFER from being propagated properly. Print error message and propagate the return value of platform_get_irq on failure. This issue was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 
platform_get_irq() returns an error code, but the intel_mid_powerbtn
driver ignores it and always returns -EINVAL. This is not correct and,
prevents -EPROBE_DEFER from being propagated properly.

Print error message and propagate the return value of platform_get_irq
on failure.

This issue was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
platform/x86: intel_mid_powerbtn: Use SCU IPC directly 2017-02-25T07:48:45+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2017-02-08T17:03:19+00:00 25b4a38fcf1be7f425b3a9eb94998c35f5b763ee On older Intel MID platforms is using SCU IPC library beneath MSIC calls. To make access unified between old and new platforms use SCU IPC library directly. It's safe since serialization is done in the library. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 
On older Intel MID platforms is using SCU IPC library beneath MSIC
calls.

To make access unified between old and new platforms use SCU IPC library
directly. It's safe since serialization is done in the library.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
platform/x86: intel_mid_powerbtn: Unify IRQ acknowledgment 2017-02-25T07:47:08+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2017-02-02T17:54:28+00:00 ca45ba06885f9f3fa9a7e70296f99d9a4899dbf4 The IRQ on Intel Merrifield can be acknowledged in the similar way it's done for previous MID platforms. Unify acknowledgment via SCU IPC. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 
The IRQ on Intel Merrifield can be acknowledged in the similar way it's
done for previous MID platforms. Unify acknowledgment via SCU IPC.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
platform/x86: intel_mid_powerbtn: Move comment to where it belongs 2017-02-13T22:39:49+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2017-02-02T17:54:27+00:00 5cb44ee2f4dde68d83a3e17c3333bc4099003669 The comments is about initial interrupt acknowledgment only. So, move it back to where it belongs. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 
The comments is about initial interrupt acknowledgment only. So, move it
back to where it belongs.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
platform/x86: intel_mid_powerbtn: Unify PBSTATUS access 2017-02-13T22:39:49+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2017-02-02T17:54:26+00:00 b30f3f8e109698f79ab1cdd30d6386d92338eb15 The status register on Intel Merrifield can be read in the similar way it's done for previous MID platforms. Unify access to PBSTATUS register via SCU IPC. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 
The status register on Intel Merrifield can be read in the similar way
it's done for previous MID platforms. Unify access to PBSTATUS register
via SCU IPC.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
platform/x86: intel_mid_powerbtn: Remove snail address 2017-02-04T01:47:25+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2017-01-19T16:39:49+00:00 1cfd3ba0c146a165951cedf293929a4983a45ae3 The snail address is subject to change. This already happened once. Remove the address completely from the file to avoid potential noise when update. While here, adjust copyright years and list authors. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 
The snail address is subject to change. This already happened once.
Remove the address completely from the file to avoid potential noise
when update.

While here, adjust copyright years and list authors.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
platform/x86: intel_mid_powerbtn: Sort headers alphabetically 2017-02-04T01:47:25+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2017-01-19T16:39:48+00:00 7591b9f52d6d119fe53fa80ae9e9943a45c28f15 Sort header inclusion block in alphabetical order. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 
Sort header inclusion block in alphabetical order.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
platform/x86: intel_mid_powerbtn: Join string literals 2017-02-04T01:47:24+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2017-01-19T16:39:47+00:00 fdde1a82265ba635284c27f3ab65be461487ff00 There is no need and bad practice for debugging to split string literals. Join them back. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 
There is no need and bad practice for debugging to split string
literals. Join them back.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
platform/x86: intel_mid_powerbtn: Enable driver for Merrifield 2017-02-04T01:47:23+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2017-01-19T16:39:46+00:00 6a0f998856383f4becfef585c18bb8949c34a1f0 Enable this driver to handle events from Basin Cove PMIC, which is installed on Intel Merrifield platform. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 
Enable this driver to handle events from Basin Cove PMIC, which is
installed on Intel Merrifield platform.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>