<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/pwm/Makefile, branch master</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge branch 'pwm/th1520' into pwm/for-next</title>
<updated>2025-11-14T10:56:14+00:00</updated>
<author>
<name>Uwe Kleine-König</name>
<email>ukleinek@kernel.org</email>
</author>
<published>2025-11-07T09:33:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a5d51e02d6fa550aed4b31ed67d230e82a771ed5'/>
<id>a5d51e02d6fa550aed4b31ed67d230e82a771ed5</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: airoha: Add support for EN7581 SoC</title>
<updated>2025-11-14T10:56:14+00:00</updated>
<author>
<name>Benjamin Larsson</name>
<email>benjamin.larsson@genexis.eu</email>
</author>
<published>2025-10-13T10:34:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b55bbc2872eb8d6ccb5011133e05f6349351fa37'/>
<id>b55bbc2872eb8d6ccb5011133e05f6349351fa37</id>
<content type='text'>
Introduce driver for PWM module available on EN7581 SoC.

Limitations:
- Only 8 concurrent waveform generators are available for 8 combinations of
  duty_cycle and period. Waveform generators are shared between 16 GPIO
  pins and 17 SIPO GPIO pins.
- Supports only normal polarity.
- On configuration the currently running period is completed.
- Minimum supported period is 4 ms
- Maximum supported period is 1s

Signed-off-by: Benjamin Larsson &lt;benjamin.larsson@genexis.eu&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Co-developed-by: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;
Signed-off-by: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Co-developed-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
Link: https://patch.msgid.link/20251013103408.14724-1-ansuelsmth@gmail.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Introduce driver for PWM module available on EN7581 SoC.

Limitations:
- Only 8 concurrent waveform generators are available for 8 combinations of
  duty_cycle and period. Waveform generators are shared between 16 GPIO
  pins and 17 SIPO GPIO pins.
- Supports only normal polarity.
- On configuration the currently running period is completed.
- Minimum supported period is 4 ms
- Maximum supported period is 1s

Signed-off-by: Benjamin Larsson &lt;benjamin.larsson@genexis.eu&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Co-developed-by: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;
Signed-off-by: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Co-developed-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
Link: https://patch.msgid.link/20251013103408.14724-1-ansuelsmth@gmail.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: Add Rust driver for T-HEAD TH1520 SoC</title>
<updated>2025-11-13T09:21:01+00:00</updated>
<author>
<name>Michal Wilczynski</name>
<email>m.wilczynski@samsung.com</email>
</author>
<published>2025-10-16T13:38:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e03724aac758f71c6cda208ea3d1afd0bbb6d9aa'/>
<id>e03724aac758f71c6cda208ea3d1afd0bbb6d9aa</id>
<content type='text'>
Introduce a PWM driver for the T-HEAD TH1520 SoC, written in Rust and
utilizing the safe PWM abstractions from the preceding commit.

The driver implements the pwm::PwmOps trait using the modern waveform
API (round_waveform_tohw, write_waveform, etc.) to support configuration
of period, duty cycle, and polarity for the TH1520's PWM channels.

Resource management is handled using idiomatic Rust patterns. The PWM
chip object is allocated via pwm::Chip::new and its registration with
the PWM core is managed by the pwm::Registration RAII guard. This
ensures pwmchip_remove is always called when the driver unbinds,
preventing resource leaks. Device managed resources are used for the
MMIO region, and the clock lifecycle is correctly managed in the
driver's private data Drop implementation.

The driver's core logic is written entirely in safe Rust, with no unsafe
blocks, except for the Send and Sync implementations for the driver
data, which are explained in the comments.

Reviewed-by: Elle Rhumsaa &lt;elle@weathered-steel.dev&gt;
Signed-off-by: Michal Wilczynski &lt;m.wilczynski@samsung.com&gt;
Link: https://patch.msgid.link/20251016-rust-next-pwm-working-fan-for-sending-v16-4-a5df2405d2bd@samsung.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Introduce a PWM driver for the T-HEAD TH1520 SoC, written in Rust and
utilizing the safe PWM abstractions from the preceding commit.

The driver implements the pwm::PwmOps trait using the modern waveform
API (round_waveform_tohw, write_waveform, etc.) to support configuration
of period, duty cycle, and polarity for the TH1520's PWM channels.

Resource management is handled using idiomatic Rust patterns. The PWM
chip object is allocated via pwm::Chip::new and its registration with
the PWM core is managed by the pwm::Registration RAII guard. This
ensures pwmchip_remove is always called when the driver unbinds,
preventing resource leaks. Device managed resources are used for the
MMIO region, and the clock lifecycle is correctly managed in the
driver's private data Drop implementation.

The driver's core logic is written entirely in safe Rust, with no unsafe
blocks, except for the Send and Sync implementations for the driver
data, which are explained in the comments.

Reviewed-by: Elle Rhumsaa &lt;elle@weathered-steel.dev&gt;
Signed-off-by: Michal Wilczynski &lt;m.wilczynski@samsung.com&gt;
Link: https://patch.msgid.link/20251016-rust-next-pwm-working-fan-for-sending-v16-4-a5df2405d2bd@samsung.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: max7360: Add MAX7360 PWM support</title>
<updated>2025-09-16T14:24:48+00:00</updated>
<author>
<name>Kamel Bouhara</name>
<email>kamel.bouhara@bootlin.com</email>
</author>
<published>2025-08-24T11:57:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d93a75d94b79ba3e664f7236ee05790e8b1d0e4b'/>
<id>d93a75d94b79ba3e664f7236ee05790e8b1d0e4b</id>
<content type='text'>
Add driver for Maxim Integrated MAX7360 PWM controller, supporting up to
8 independent PWM outputs.

Signed-off-by: Kamel Bouhara &lt;kamel.bouhara@bootlin.com&gt;
Co-developed-by: Mathieu Dubois-Briand &lt;mathieu.dubois-briand@bootlin.com&gt;
Signed-off-by: Mathieu Dubois-Briand &lt;mathieu.dubois-briand@bootlin.com&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
Link: https://lore.kernel.org/r/20250824-mdb-max7360-support-v14-4-435cfda2b1ea@bootlin.com
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add driver for Maxim Integrated MAX7360 PWM controller, supporting up to
8 independent PWM outputs.

Signed-off-by: Kamel Bouhara &lt;kamel.bouhara@bootlin.com&gt;
Co-developed-by: Mathieu Dubois-Briand &lt;mathieu.dubois-briand@bootlin.com&gt;
Signed-off-by: Mathieu Dubois-Briand &lt;mathieu.dubois-briand@bootlin.com&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
Link: https://lore.kernel.org/r/20250824-mdb-max7360-support-v14-4-435cfda2b1ea@bootlin.com
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: argon-fan-hat: Add Argon40 Fan HAT support</title>
<updated>2025-07-07T06:39:35+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-06-29T22:07:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0191c80e8a288d38f3f5a17dd0bb6a3b08c6e464'/>
<id>0191c80e8a288d38f3f5a17dd0bb6a3b08c6e464</id>
<content type='text'>
Add trivial PWM driver for Argon40 Fan HAT, which is a RaspberryPi
blower fan hat which can be controlled over I2C. Model this device
as a PWM, so the pwm-fan can be attached to it and handle thermal
zones and RPM management in a generic manner.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Link: https://lore.kernel.org/r/20250629220757.936212-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add trivial PWM driver for Argon40 Fan HAT, which is a RaspberryPi
blower fan hat which can be controlled over I2C. Model this device
as a PWM, so the pwm-fan can be attached to it and handle thermal
zones and RPM management in a generic manner.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Link: https://lore.kernel.org/r/20250629220757.936212-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: Tidyup PWM menu for Renesas</title>
<updated>2025-05-14T08:20:55+00:00</updated>
<author>
<name>Kuninori Morimoto</name>
<email>kuninori.morimoto.gx@renesas.com</email>
</author>
<published>2025-05-12T06:33:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=25ac4834cae97f7787ba5562ce1511d7524955e0'/>
<id>25ac4834cae97f7787ba5562ce1511d7524955e0</id>
<content type='text'>
Because current PWM Kconfig is sorting by symbol name,
it looks strange ordering in menuconfig.

=&gt;	[ ]   Renesas R-Car PWM support
=&gt;	[ ]   Renesas TPU PWM support
	[ ]   Rockchip PWM support
=&gt;	[ ]   Renesas RZ/G2L General PWM Timer support
=&gt;	[ ]   Renesas RZ/G2L MTU3a PWM Timer support

Let's use common CONFIG_PWM_RENESAS_xxx symbol name for Renesas,
and sort it.

Signed-off-by: Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;
Reviewed-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/877c2mxrrr.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Because current PWM Kconfig is sorting by symbol name,
it looks strange ordering in menuconfig.

=&gt;	[ ]   Renesas R-Car PWM support
=&gt;	[ ]   Renesas TPU PWM support
	[ ]   Rockchip PWM support
=&gt;	[ ]   Renesas RZ/G2L General PWM Timer support
=&gt;	[ ]   Renesas RZ/G2L MTU3a PWM Timer support

Let's use common CONFIG_PWM_RENESAS_xxx symbol name for Renesas,
and sort it.

Signed-off-by: Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;
Reviewed-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/877c2mxrrr.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: Restore alphabetic ordering in Kconfig and Makefile</title>
<updated>2025-05-08T09:52:31+00:00</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@baylibre.com</email>
</author>
<published>2025-05-08T08:17:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=84e351d8a5755c60e14b7e42d70c2415541928d7'/>
<id>84e351d8a5755c60e14b7e42d70c2415541928d7</id>
<content type='text'>
The drivers are nearly ordered alphabetically by the symbol name. Fix the
few outliers.

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@baylibre.com&gt;
Link: https://lore.kernel.org/r/20250508081706.751209-2-u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The drivers are nearly ordered alphabetically by the symbol name. Fix the
few outliers.

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@baylibre.com&gt;
Link: https://lore.kernel.org/r/20250508081706.751209-2-u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: add support for NXPs high-side switch MC33XS2410</title>
<updated>2025-05-02T16:39:21+00:00</updated>
<author>
<name>Dimitri Fedrau</name>
<email>dimitri.fedrau@liebherr.com</email>
</author>
<published>2025-04-07T11:21:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2006016ec6b3a18f2659704cb2f70ad3387f4a62'/>
<id>2006016ec6b3a18f2659704cb2f70ad3387f4a62</id>
<content type='text'>
The MC33XS2410 is a four channel high-side switch. Featuring advanced
monitoring and control function, the device is operational from 3.0 V to
60 V. The device is controlled by SPI port for configuration.

Signed-off-by: Dimitri Fedrau &lt;dimitri.fedrau@liebherr.com&gt;
Link: https://lore.kernel.org/r/20250407-mc33xs2410-v9-2-57adcb56a6e4@liebherr.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The MC33XS2410 is a four channel high-side switch. Featuring advanced
monitoring and control function, the device is operational from 3.0 V to
60 V. The device is controlled by SPI port for configuration.

Signed-off-by: Dimitri Fedrau &lt;dimitri.fedrau@liebherr.com&gt;
Link: https://lore.kernel.org/r/20250407-mc33xs2410-v9-2-57adcb56a6e4@liebherr.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: Add support for RZ/G2L GPT</title>
<updated>2025-04-17T09:52:13+00:00</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2025-02-26T14:45:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=061f087f5d0bcae9f43ae0101121fcaa999d2809'/>
<id>061f087f5d0bcae9f43ae0101121fcaa999d2809</id>
<content type='text'>
RZ/G2L General PWM Timer (GPT) composed of 8 channels with 32-bit timer
(GPT32E). It supports the following functions
 * 32 bits x 8 channels
 * Up-counting or down-counting (saw waves) or up/down-counting
   (triangle waves) for each counter.
 * Clock sources independently selectable for each channel
 * Two I/O pins per channel
 * Two output compare/input capture registers per channel
 * For the two output compare/input capture registers of each channel,
   four registers are provided as buffer registers and are capable of
   operating as comparison registers when buffering is not in use.
 * In output compare operation, buffer switching can be at crests or
   troughs, enabling the generation of laterally asymmetric PWM waveforms.
 * Registers for setting up frame cycles in each channel (with capability
   for generating interrupts at overflow or underflow)
 * Generation of dead times in PWM operation
 * Synchronous starting, stopping and clearing counters for arbitrary
   channels
 * Starting, stopping, clearing and up/down counters in response to input
   level comparison
 * Starting, clearing, stopping and up/down counters in response to a
   maximum of four external triggers
 * Output pin disable function by dead time error and detected
   short-circuits between output pins
 * A/D converter start triggers can be generated (GPT32E0 to GPT32E3)
 * Enables the noise filter for input capture and external trigger
   operation

Add basic pwm support for RZ/G2L GPT driver by creating separate
logical channels for each IOs.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20250226144531.176819-4-biju.das.jz@bp.renesas.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
RZ/G2L General PWM Timer (GPT) composed of 8 channels with 32-bit timer
(GPT32E). It supports the following functions
 * 32 bits x 8 channels
 * Up-counting or down-counting (saw waves) or up/down-counting
   (triangle waves) for each counter.
 * Clock sources independently selectable for each channel
 * Two I/O pins per channel
 * Two output compare/input capture registers per channel
 * For the two output compare/input capture registers of each channel,
   four registers are provided as buffer registers and are capable of
   operating as comparison registers when buffering is not in use.
 * In output compare operation, buffer switching can be at crests or
   troughs, enabling the generation of laterally asymmetric PWM waveforms.
 * Registers for setting up frame cycles in each channel (with capability
   for generating interrupts at overflow or underflow)
 * Generation of dead times in PWM operation
 * Synchronous starting, stopping and clearing counters for arbitrary
   channels
 * Starting, stopping, clearing and up/down counters in response to input
   level comparison
 * Starting, clearing, stopping and up/down counters in response to a
   maximum of four external triggers
 * Output pin disable function by dead time error and detected
   short-circuits between output pins
 * A/D converter start triggers can be generated (GPT32E0 to GPT32E3)
 * Enables the noise filter for input capture and external trigger
   operation

Add basic pwm support for RZ/G2L GPT driver by creating separate
logical channels for each IOs.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20250226144531.176819-4-biju.das.jz@bp.renesas.com
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: Add Loongson PWM controller support</title>
<updated>2025-04-14T06:03:15+00:00</updated>
<author>
<name>Binbin Zhou</name>
<email>zhoubinbin@loongson.cn</email>
</author>
<published>2025-03-31T06:53:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2b62c89448dd41ebf16d860c52fe9a8aba3dd8a3'/>
<id>2b62c89448dd41ebf16d860c52fe9a8aba3dd8a3</id>
<content type='text'>
This commit adds a generic PWM framework driver for the PWM controller
found on Loongson family chips.

Acked-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
Co-developed-by: Juxin Gao &lt;gaojuxin@loongson.cn&gt;
Signed-off-by: Juxin Gao &lt;gaojuxin@loongson.cn&gt;
Signed-off-by: Binbin Zhou &lt;zhoubinbin@loongson.cn&gt;
Link: https://lore.kernel.org/r/76050a903a8015422fb9261ad88c7d9cc2edbbd8.1743403075.git.zhoubinbin@loongson.cn
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This commit adds a generic PWM framework driver for the PWM controller
found on Loongson family chips.

Acked-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
Co-developed-by: Juxin Gao &lt;gaojuxin@loongson.cn&gt;
Signed-off-by: Juxin Gao &lt;gaojuxin@loongson.cn&gt;
Signed-off-by: Binbin Zhou &lt;zhoubinbin@loongson.cn&gt;
Link: https://lore.kernel.org/r/76050a903a8015422fb9261ad88c7d9cc2edbbd8.1743403075.git.zhoubinbin@loongson.cn
Signed-off-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
