Use regmap helpers for get_voltage_sel and set_voltage_sel ops if the DVS GPIO is not set. The DVS GPIO allows on the fly selection of the VSEL register from two choices. However, if it is not set, the VSEL register will stay fixed and we can use the regmap ops. This allows use of the *hardware_vsel* regulator APIs. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
i2c_driver does not need to set an owner because i2c_register_driver() will set it. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Add support to configure Enhanced Transient Response Enable (ETR) and Sensitivity Selection based on maximum current i.e. expected load on that rail. Maxim recommended as: - Enable ETR with high sensitivity (75mV/us) for 0 to 9A expected loads, - Enable ETR with low sensitivity (150mV/us) for 9A to 12A expected loads. - Disable ETR for expected load > 12A. These recommendation will be configured for MAX77621 when maximum load is provided through regulator constraint for maximum current from platform. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
The MAX8973/MAX77621 feature an Enhanced Transient Response(ETR) circuit that is enabled through software. The enhanced transient response reduces the voltage droop during large load steps by temporarily allowing all three phases to fire in unison, slewing total inductor current faster than would normally be possible if all three phases continued to operate 120deg out of phase. The enhanced transient response detector features two selectable sensitivity settings, which select the output voltage slew rate during load transients that triggers the ETR circuit. The sensitivity of the ETR detector is set by the CKADV[1:0] bits in the CONTROL2 register. Add support to configure the ETR through platform data from DT. Update the DT binding document accordingly. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
The control flag for the bias control is MAX8973_CONTROL_BIAS_ENABLE rather than MAX8973_BIAS_ENABLE which is macro for the bits in register. Fix this typo. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Fix trivial typo. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Maxim MAX77621 device is high-efficiency, three-phase, DC-DC step-down switching regulator delivers peak output currents up to 16A. This device is extension of MAX8973 and compatible with the register definition. The MAX77621 has the SHUTDOWN pin which is EN pin on the MAX8973. On MAX77621, the SHUTDOWN pin (active low) reset device register to its POR/OTP value. The voltage output is enabled when SHUTDONW pin is HIGH and EN bit on VOUT register is HIGH. For MAX8973, VOUT is enabled when EN bit or EN pin is high. Add support of the MAX77621 device on max8973 regulator driver with following changes: - Make sure SHUTDOWN pin is set HIGH through GPIO calls if GPIO from AP connected to SHUTDOWN pin provided. - Enable/disable the rail through register access only. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Regulator core framework support the configuration of ramp delay reading from platform specific regulator data via the regulator callback ops. Instead of reading regulator init data on driver and setting ramp delay, use the callback to achieve this. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
MAX8973 supports the voltage output enable/disable through its EN pin. This EN pin can be connected through GPIO from host processor. Add support to provide GPIO number from platform/DT and if it is valid GPIO then enable external control default. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>