<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/resctrl/mpam_internal.h, branch v6.19-rc2</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>arm_mpam: Add kunit tests for props_mismatch()</title>
<updated>2025-11-19T18:34:24+00:00</updated>
<author>
<name>James Morse</name>
<email>james.morse@arm.com</email>
</author>
<published>2025-11-19T12:23:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2557e0eafec1547aa9e0e768d2376e66252dada4'/>
<id>2557e0eafec1547aa9e0e768d2376e66252dada4</id>
<content type='text'>
When features are mismatched between MSC the way features are combined
to the class determines whether resctrl can support this SoC.

Add some tests to illustrate the sort of thing that is expected to
work, and those that must be removed.

Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Reviewed-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When features are mismatched between MSC the way features are combined
to the class determines whether resctrl can support this SoC.

Add some tests to illustrate the sort of thing that is expected to
work, and those that must be removed.

Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Reviewed-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm_mpam: Add helper to reset saved mbwu state</title>
<updated>2025-11-19T18:34:24+00:00</updated>
<author>
<name>James Morse</name>
<email>james.morse@arm.com</email>
</author>
<published>2025-11-19T12:23:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=201d96ca4c867695880450930258cd5c97f099d4'/>
<id>201d96ca4c867695880450930258cd5c97f099d4</id>
<content type='text'>
resctrl expects to reset the bandwidth counters when the filesystem
is mounted.

To allow this, add a helper that clears the saved mbwu state. Instead
of cross calling to each CPU that can access the component MSC to
write to the counter, set a flag that causes it to be zero'd on the
the next read. This is easily done by forcing a configuration update.

Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Cc: Peter Newman &lt;peternewman@google.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvdia.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
resctrl expects to reset the bandwidth counters when the filesystem
is mounted.

To allow this, add a helper that clears the saved mbwu state. Instead
of cross calling to each CPU that can access the component MSC to
write to the counter, set a flag that causes it to be zero'd on the
the next read. This is easily done by forcing a configuration update.

Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Cc: Peter Newman &lt;peternewman@google.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvdia.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm_mpam: Probe for long/lwd mbwu counters</title>
<updated>2025-11-19T18:34:23+00:00</updated>
<author>
<name>Rohit Mathew</name>
<email>rohit.mathew@arm.com</email>
</author>
<published>2025-11-19T12:22:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fdc29a141d6364645509cb20129cba1f84e4c10f'/>
<id>fdc29a141d6364645509cb20129cba1f84e4c10f</id>
<content type='text'>
mpam v0.1 and versions above v1.0 support optional long counter for
memory bandwidth monitoring. The MPAMF_MBWUMON_IDR register has fields
indicating support for long counters.

Probe these feature bits.

The mpam_feat_msmon_mbwu feature is used to indicate that bandwidth
monitors are supported, instead of muddling this with which size of
bandwidth monitors, add an explicit 31 bit counter feature.

Signed-off-by: Rohit Mathew &lt;rohit.mathew@arm.com&gt;
[ morse: Added 31bit counter feature to simplify later logic ]
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Reviewed-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Peter Newman &lt;peternewman@google.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
mpam v0.1 and versions above v1.0 support optional long counter for
memory bandwidth monitoring. The MPAMF_MBWUMON_IDR register has fields
indicating support for long counters.

Probe these feature bits.

The mpam_feat_msmon_mbwu feature is used to indicate that bandwidth
monitors are supported, instead of muddling this with which size of
bandwidth monitors, add an explicit 31 bit counter feature.

Signed-off-by: Rohit Mathew &lt;rohit.mathew@arm.com&gt;
[ morse: Added 31bit counter feature to simplify later logic ]
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Reviewed-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Peter Newman &lt;peternewman@google.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm_mpam: Consider overflow in bandwidth counter state</title>
<updated>2025-11-19T18:34:23+00:00</updated>
<author>
<name>Ben Horgan</name>
<email>ben.horgan@arm.com</email>
</author>
<published>2025-11-19T12:22:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b35363793291e36c91d4a5b62d7ae7079c70d826'/>
<id>b35363793291e36c91d4a5b62d7ae7079c70d826</id>
<content type='text'>
Use the overflow status bit to track overflow on each bandwidth counter
read and add the counter size to the correction when overflow is detected.

This assumes that only a single overflow has occurred since the last read
of the counter. Overflow interrupts, on hardware that supports them could
be used to remove this limitation.

Cc: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use the overflow status bit to track overflow on each bandwidth counter
read and add the counter size to the correction when overflow is detected.

This assumes that only a single overflow has occurred since the last read
of the counter. Overflow interrupts, on hardware that supports them could
be used to remove this limitation.

Cc: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm_mpam: Track bandwidth counter state for power management</title>
<updated>2025-11-19T18:34:23+00:00</updated>
<author>
<name>James Morse</name>
<email>james.morse@arm.com</email>
</author>
<published>2025-11-19T12:22:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=41e8a14950e1732af51cfec8fa09f8ded02a5ca9'/>
<id>41e8a14950e1732af51cfec8fa09f8ded02a5ca9</id>
<content type='text'>
Bandwidth counters need to run continuously to correctly reflect the
bandwidth.

Save the counter state when the hardware is reset due to CPU hotplug.
Add struct mbwu_state to track the bandwidth counter. Support for
tracking overflow with the same structure will be added in a
subsequent commit.

Cc: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Bandwidth counters need to run continuously to correctly reflect the
bandwidth.

Save the counter state when the hardware is reset due to CPU hotplug.
Add struct mbwu_state to track the bandwidth counter. Support for
tracking overflow with the same structure will be added in a
subsequent commit.

Cc: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm_mpam: Add mpam_msmon_read() to read monitor value</title>
<updated>2025-11-19T18:34:23+00:00</updated>
<author>
<name>James Morse</name>
<email>james.morse@arm.com</email>
</author>
<published>2025-11-19T12:22:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=823e7c3712c584641b4ef890a8af34884c677197'/>
<id>823e7c3712c584641b4ef890a8af34884c677197</id>
<content type='text'>
Reading a monitor involves configuring what you want to monitor, and
reading the value. Components made up of multiple MSC may need values
from each MSC. MSCs may take time to configure, returning 'not ready'.
The maximum 'not ready' time should have been provided by firmware.

Add mpam_msmon_read() to hide all this. If (one of) the MSC returns
not ready, then wait the full timeout value before trying again.

CC: Shanker Donthineni &lt;sdonthineni@nvidia.com&gt;
Cc: Shaopeng Tan (Fujitsu) &lt;tan.shaopeng@fujitsu.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Peter Newman &lt;peternewman@google.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Reading a monitor involves configuring what you want to monitor, and
reading the value. Components made up of multiple MSC may need values
from each MSC. MSCs may take time to configure, returning 'not ready'.
The maximum 'not ready' time should have been provided by firmware.

Add mpam_msmon_read() to hide all this. If (one of) the MSC returns
not ready, then wait the full timeout value before trying again.

CC: Shanker Donthineni &lt;sdonthineni@nvidia.com&gt;
Cc: Shaopeng Tan (Fujitsu) &lt;tan.shaopeng@fujitsu.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Peter Newman &lt;peternewman@google.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm_mpam: Add helpers to allocate monitors</title>
<updated>2025-11-19T18:34:22+00:00</updated>
<author>
<name>James Morse</name>
<email>james.morse@arm.com</email>
</author>
<published>2025-11-19T12:22:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c891bae66423bc69a680ca1de34940132e2c8ace'/>
<id>c891bae66423bc69a680ca1de34940132e2c8ace</id>
<content type='text'>
MPAM's MSC support a number of monitors, each of which supports
bandwidth counters, or cache-storage-utilisation counters. To use
a counter, a monitor needs to be configured. Add helpers to allocate
and free CSU or MBWU monitors.

Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Reviewed-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Peter Newman &lt;peternewman@google.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
MPAM's MSC support a number of monitors, each of which supports
bandwidth counters, or cache-storage-utilisation counters. To use
a counter, a monitor needs to be configured. Add helpers to allocate
and free CSU or MBWU monitors.

Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Reviewed-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Peter Newman &lt;peternewman@google.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm_mpam: Probe and reset the rest of the features</title>
<updated>2025-11-19T18:34:22+00:00</updated>
<author>
<name>James Morse</name>
<email>james.morse@arm.com</email>
</author>
<published>2025-11-19T12:22:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=880df85d8673f8e2395f139d3618661366e5d4d8'/>
<id>880df85d8673f8e2395f139d3618661366e5d4d8</id>
<content type='text'>
MPAM supports more features than are going to be exposed to resctrl.
For partid other than 0, the reset values of these controls isn't
known.

Discover the rest of the features so they can be reset to avoid any
side effects when resctrl is in use.

PARTID narrowing allows MSC/RIS to support less configuration space than
is usable. If this feature is found on a class of device we are likely
to use, then reduce the partid_max to make it usable. This allows us
to map a PARTID to itself.

CC: Rohit Mathew &lt;Rohit.Mathew@arm.com&gt;
CC: Zeng Heng &lt;zengheng4@huawei.com&gt;
CC: Dave Martin &lt;Dave.Martin@arm.com&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Peter Newman &lt;peternewman@google.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
MPAM supports more features than are going to be exposed to resctrl.
For partid other than 0, the reset values of these controls isn't
known.

Discover the rest of the features so they can be reset to avoid any
side effects when resctrl is in use.

PARTID narrowing allows MSC/RIS to support less configuration space than
is usable. If this feature is found on a class of device we are likely
to use, then reduce the partid_max to make it usable. This allows us
to map a PARTID to itself.

CC: Rohit Mathew &lt;Rohit.Mathew@arm.com&gt;
CC: Zeng Heng &lt;zengheng4@huawei.com&gt;
CC: Dave Martin &lt;Dave.Martin@arm.com&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Peter Newman &lt;peternewman@google.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm_mpam: Allow configuration to be applied and restored during cpu online</title>
<updated>2025-11-19T18:34:22+00:00</updated>
<author>
<name>James Morse</name>
<email>james.morse@arm.com</email>
</author>
<published>2025-11-19T12:22:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=09b89d2a72f37b078198cbb09d5b9e13ba9d68b9'/>
<id>09b89d2a72f37b078198cbb09d5b9e13ba9d68b9</id>
<content type='text'>
When CPUs come online the MSC's original configuration should be restored.

Add struct mpam_config to hold the configuration. For each component, this
has a bitmap of features that have been changed from the reset values. The
mpam_config is also used on RIS reset where all bits are set to ensure all
features are reset.

Once the maximum partid is known, allocate a configuration array for each
component, and reprogram each RIS configuration from this.

CC: Dave Martin &lt;Dave.Martin@arm.com&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Cc: Fujitsu Fujitsu &lt;Shaopeng Tan  tan.shaopeng@fujitsu.com&gt;
Cc: Peter Newman peternewman@google.com
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When CPUs come online the MSC's original configuration should be restored.

Add struct mpam_config to hold the configuration. For each component, this
has a bitmap of features that have been changed from the reset values. The
mpam_config is also used on RIS reset where all bits are set to ensure all
features are reset.

Once the maximum partid is known, allocate a configuration array for each
component, and reprogram each RIS configuration from this.

CC: Dave Martin &lt;Dave.Martin@arm.com&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Cc: Fujitsu Fujitsu &lt;Shaopeng Tan  tan.shaopeng@fujitsu.com&gt;
Cc: Peter Newman peternewman@google.com
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm_mpam: Use a static key to indicate when mpam is enabled</title>
<updated>2025-11-19T18:34:22+00:00</updated>
<author>
<name>James Morse</name>
<email>james.morse@arm.com</email>
</author>
<published>2025-11-19T12:22:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3796f75aa7958d26b93a2508de5fc1e0b2f8a853'/>
<id>3796f75aa7958d26b93a2508de5fc1e0b2f8a853</id>
<content type='text'>
Once all the MSC have been probed, the system wide usable number of
PARTID is known and the configuration arrays can be allocated.

After this point, checking all the MSC have been probed is pointless,
and the cpuhp callbacks should restore the configuration, instead of
just resetting the MSC.

Add a static key to enable this behaviour. This will also allow MPAM
to be disabled in response to an error, and the architecture code to
enable/disable the context switch of the MPAM system registers.

Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Peter Newman &lt;peternewman@google.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Once all the MSC have been probed, the system wide usable number of
PARTID is known and the configuration arrays can be allocated.

After this point, checking all the MSC have been probed is pointless,
and the cpuhp callbacks should restore the configuration, instead of
just resetting the MSC.

Add a static key to enable this behaviour. This will also allow MPAM
to be disabled in response to an error, and the architecture code to
enable/disable the context switch of the MPAM system registers.

Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Reviewed-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Reviewed-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Reviewed-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Fenghua Yu &lt;fenghuay@nvidia.com&gt;
Tested-by: Shaopeng Tan &lt;tan.shaopeng@jp.fujitsu.com&gt;
Tested-by: Peter Newman &lt;peternewman@google.com&gt;
Tested-by: Carl Worth &lt;carl@os.amperecomputing.com&gt;
Tested-by: Gavin Shan &lt;gshan@redhat.com&gt;
Tested-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Ben Horgan &lt;ben.horgan@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
