linux-toradex.git/drivers/reset/Kconfig, branch v4.19 Linux kernel for Apalis and Colibri modules reset: meson: add meson audio arb driver 2018-07-20T16:17:31+00:00 Jerome Brunet jbrunet@baylibre.com 2018-07-20T15:26:33+00:00 d903779b58be442f3afd2c51c46c7cf19c97684e The Amlogic Audio ARB is a simple device which enables or disables the access of Audio FIFOs to DDR on AXG based SoC. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> 
The Amlogic Audio ARB is a simple device which enables or
disables the access of Audio FIFOs to DDR on AXG based SoC.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: uniphier: add USB3 core reset control 2018-07-16T10:15:55+00:00 Kunihiko Hayashi hayashi.kunihiko@socionext.com 2018-07-10T01:14:17+00:00 499fef09a3237497906084da3eede0185fc9abb8 Add a reset line to enable USB3 core implemented in UniPhier SoCs. This reuses only the reset operations in reset-simple, because the reset-simple doesn't handle any SoC-dependent clocks and resets. This reset line is included in the USB3 glue layer, and it's necessary to enable clocks and deassert resets of the layer before using this reset line. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> 
Add a reset line to enable USB3 core implemented in UniPhier SoCs.

This reuses only the reset operations in reset-simple, because
the reset-simple doesn't handle any SoC-dependent clocks and resets.
This reset line is included in the USB3 glue layer, and it's necessary
to enable clocks and deassert resets of the layer before using this
reset line.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: qcom: AOSS (always on subsystem) reset controller 2018-07-16T10:15:51+00:00 Sibi Sankar sibis@codeaurora.org 2018-06-27T14:24:43+00:00 5ecb065165b90a5745f3a6c3a8a847b530e3afbc Add reset controller driver for Qualcomm SDM845 SoC to control reset signals provided by AOSS for Modem, Venus ADSP, GPU, Camera, Wireless, Display subsystem Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> 
Add reset controller driver for Qualcomm SDM845 SoC to
control reset signals provided by AOSS for Modem, Venus
ADSP, GPU, Camera, Wireless, Display subsystem

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: stm32mp1: Enable stm32mp1 reset driver 2018-03-27T08:44:04+00:00 Gabriel Fernandez gabriel.fernandez@st.com 2018-03-19T07:25:51+00:00 197858b68532d415f21a5a92fb6661c67c6c9a97 stm32mp1 RCC IP 1 has a reset SET register and a reset CLEAR register. Writing '0' on reset SET register has no effect Writing '1' on reset SET register activates the reset of the corresponding peripheral Writing '0' on reset CLEAR register has no effect Writing '1' on reset CLEAR register releases the reset of the corresponding peripheral See Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.txt Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> 
stm32mp1 RCC IP 1 has a reset SET register and a reset CLEAR register.

Writing '0' on reset SET register has no effect
Writing '1' on reset SET register
	activates the reset of the corresponding peripheral

Writing '0' on reset CLEAR register	has no effect
Writing '1' on reset CLEAR register
	releases the reset of the corresponding peripheral

See Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.txt

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: imx7: add 'depends on HAS_IOMEM' to fix unmet dependency 2018-03-27T08:44:02+00:00 Masahiro Yamada yamada.masahiro@socionext.com 2018-03-06T11:15:11+00:00 8fa566206efdef4d3ec7f13bed36302f9969f2ef This config select's MFD_SYSCON, but does not depend on HAS_IOMEM. Compile testing on architecture without HAS_IOMEM causes "unmet direct dependencies" in Kconfig phase. Detected by "make ARCH=score allyesconfig". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> 
This config select's MFD_SYSCON, but does not depend on HAS_IOMEM.

Compile testing on architecture without HAS_IOMEM causes "unmet
direct dependencies" in Kconfig phase.

Detected by "make ARCH=score allyesconfig".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: simple: Enable for ASPEED systems 2018-02-20T16:42:29+00:00 Joel Stanley joel@jms.id.au 2018-02-20T01:43:29+00:00 1d7592f84f92c6344978186fdbe547af044274b5 ASPEED BMC SoCs have a reset controller in the LPC IP that can be controlled using this driver to release the UARTs from reset. No special configuration is required, so only the compatible string is added. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> 
ASPEED BMC SoCs have a reset controller in the LPC IP that can be
controlled using this driver to release the UARTs from reset.

No special configuration is required, so only the compatible string is
added.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Merge branch 'reset/arc' into reset/next 2017-10-18T13:59:30+00:00 Philipp Zabel p.zabel@pengutronix.de 2017-10-18T13:55:44+00:00 542befbb18056c4fda7b458aa6146a52b2fd389c Merge the AXS10x driver, which is also merged into git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git for-next 
Merge the AXS10x driver, which is also merged into
git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git for-next
reset: zx2967: use the reset-simple driver 2017-10-18T13:51:04+00:00 Philipp Zabel p.zabel@pengutronix.de 2017-08-11T11:03:05+00:00 f0e0ada67dfd8342fd411da6e3bff10ff9bcc97b The reset-simple driver can be used without changes. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Alexandru Gagniuc <alex.g@adaptrum.com> 
The reset-simple driver can be used without changes.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Alexandru Gagniuc <alex.g@adaptrum.com>
reset: stm32: use the reset-simple driver 2017-10-18T13:51:03+00:00 Philipp Zabel p.zabel@pengutronix.de 2017-08-11T11:02:47+00:00 0af8a137361330af644ae9a3475b328a1dfb7945 The reset-simple driver can be used without changes. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Gabriel Fernandez <gabriel.fernandez@st.com> 
The reset-simple driver can be used without changes.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Gabriel Fernandez <gabriel.fernandez@st.com>
reset: socfpga: use the reset-simple driver 2017-10-18T13:51:02+00:00 Philipp Zabel p.zabel@pengutronix.de 2017-08-11T11:02:19+00:00 adf20d7ce7c3591e049910c7760edd9c7da4a246 Add reset line status readback, inverted status support, and socfpga device tree quirks to the simple reset driver, and use it to replace the socfpga driver. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> 
Add reset line status readback, inverted status support, and socfpga
device tree quirks to the simple reset driver, and use it to replace
the socfpga driver.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>