<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/rtc/rtc-armada38x.c, branch v4.19-rc3</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>rtc: armada38x: reset after rtc power loss</title>
<updated>2018-07-12T18:16:08+00:00</updated>
<author>
<name>Baruch Siach</name>
<email>baruch@tkos.co.il</email>
</author>
<published>2018-06-21T17:40:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1a990fefb641398fb580a0ea0be99b0ff27cbb9b'/>
<id>1a990fefb641398fb580a0ea0be99b0ff27cbb9b</id>
<content type='text'>
When the RTC block looses power it needs a reset sequence to make it
usable again. Otherwise, writes to the time register have no effect.

This reset sequence combines information from the mvebu_rtc driver in
the Marvell provided U-Boot, and the SolidRun provided U-Boot repo.

Tested on the Armada 388 based SolidRun Clearfog Base.

Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Acked-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When the RTC block looses power it needs a reset sequence to make it
usable again. Otherwise, writes to the time register have no effect.

This reset sequence combines information from the mvebu_rtc driver in
the Marvell provided U-Boot, and the SolidRun provided U-Boot repo.

Tested on the Armada 388 based SolidRun Clearfog Base.

Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Acked-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rtc: armada38x: add support for trimming the RTC</title>
<updated>2017-10-25T21:05:52+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@armlinux.org.uk</email>
</author>
<published>2017-09-29T10:23:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f94ffbc2c2a4128c4412bb483d0807722dfb682b'/>
<id>f94ffbc2c2a4128c4412bb483d0807722dfb682b</id>
<content type='text'>
Add support for trimming the RTC using the offset mechanism.  This RTC
supports two modes: low update mode and high update mode.  Low update
mode has finer precision than high update mode, so we use the low mode
where possible.

Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for trimming the RTC using the offset mechanism.  This RTC
supports two modes: low update mode and high update mode.  Low update
mode has finer precision than high update mode, so we use the low mode
where possible.

Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rtc: armada38x: Add support for Armada 7K/8K</title>
<updated>2017-02-21T22:21:30+00:00</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@free-electrons.com</email>
</author>
<published>2017-02-20T17:38:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=34f54f579a9988e96e85e22fc151c15955ae40f0'/>
<id>34f54f579a9988e96e85e22fc151c15955ae40f0</id>
<content type='text'>
The Armada 7K/8K use the same RTC IP than the Armada 38x. However the SOC
integration differs in 2 points:
 - MBUS bridge timing initialization
 - IRQ configuration at SoC level

Moreover the Armada 7K/8K have an issue preventing to get the interrupt
from alarm 1. This commit allows to use alarm 2 for these A7K/8K but to
still use alarm 1 for the Armada 38x.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Armada 7K/8K use the same RTC IP than the Armada 38x. However the SOC
integration differs in 2 points:
 - MBUS bridge timing initialization
 - IRQ configuration at SoC level

Moreover the Armada 7K/8K have an issue preventing to get the interrupt
from alarm 1. This commit allows to use alarm 2 for these A7K/8K but to
still use alarm 1 for the Armada 38x.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rtc: armada38x: Prepare driver to manage different versions</title>
<updated>2017-02-21T22:21:28+00:00</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@free-electrons.com</email>
</author>
<published>2017-02-20T17:38:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=75faea9179a775fbc3380e918ac90dc9991dc450'/>
<id>75faea9179a775fbc3380e918ac90dc9991dc450</id>
<content type='text'>
In order to prepare the introduction of the A7K/A8K version of the RTC,
this commit introduces a new data structure. This structure allows to
handle the differences between the integration of the RTC IP in the
SoCs. It will be:
 - MBUS bridge timing initialization
 - IRQ configuration at SoC level

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In order to prepare the introduction of the A7K/A8K version of the RTC,
this commit introduces a new data structure. This structure allows to
handle the differences between the integration of the RTC IP in the
SoCs. It will be:
 - MBUS bridge timing initialization
 - IRQ configuration at SoC level

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rtc: armada38x: make struct rtc_class_ops const</title>
<updated>2017-01-12T11:33:58+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@armlinux.org.uk</email>
</author>
<published>2017-01-11T10:16:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d748c9810be2d6a570aad0390463c9ac4336b161'/>
<id>d748c9810be2d6a570aad0390463c9ac4336b161</id>
<content type='text'>
Armada38x wants to modify its rtc_class_ops to remove the interrupt
handling when there is no usable interrupt, but this means we leave
function pointers in writable memory.

Since rtc_class_ops is small, arrange to have two instances, one for
when we have interrupts, and one for when we have none, both marked
const.  This allows the compiler to place them in read-only memory,
which is better than placing them in __ro_after_init.

Thanks to Bhumika Goyal &lt;bhumirks@gmail.com&gt; for pointing out that
the structure was writable and submitting a patch to add
__ro_after_init.

Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Armada38x wants to modify its rtc_class_ops to remove the interrupt
handling when there is no usable interrupt, but this means we leave
function pointers in writable memory.

Since rtc_class_ops is small, arrange to have two instances, one for
when we have interrupts, and one for when we have none, both marked
const.  This allows the compiler to place them in read-only memory,
which is better than placing them in __ro_after_init.

Thanks to Bhumika Goyal &lt;bhumirks@gmail.com&gt; for pointing out that
the structure was writable and submitting a patch to add
__ro_after_init.

Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rtc: armada38x: Follow the new recommendation for errata implementation</title>
<updated>2017-01-11T16:23:03+00:00</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@free-electrons.com</email>
</author>
<published>2016-12-21T10:28:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=844a3073c9896dd252810e388c2fd881efb22d66'/>
<id>844a3073c9896dd252810e388c2fd881efb22d66</id>
<content type='text'>
According to RES-3124064:

The device supports CPU write and read access to the RTC time register.
However, due to this restriction, read and write from/to internal RTC
register may fail.

Workaround:
General setup:
1. Configure the RTC Mbus Bridge Timing Control register (offset 0x184A0)
   to value 0xFD4D4FFF
   Write RTC WRCLK Period to its maximum value (0x3FF)
   Write RTC WRCLK setup to 0x29
   Write RTC WRCLK High Time to 0x53 (default value)
   Write RTC Read Output Delay to its maximum value (0x1F)
   Mbus - Read All Byte Enable to 0x1 (default value)
2. Configure the RTC Test Configuration Register (offset 0xA381C) bit3
   to '1' (Reserved, Marvell internal)

For any RTC register read operation:
1. Read the requested register 100 times.
2. Find the result that appears most frequently and use this result
   as the correct value.

For any RTC register write operation:
1. Issue two dummy writes of 0x0 to the RTC Status register (offset
   0xA3800).
2. Write the time to the RTC Time register (offset 0xA380C).

This patch is based on the work of Shaker Daibes

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
According to RES-3124064:

The device supports CPU write and read access to the RTC time register.
However, due to this restriction, read and write from/to internal RTC
register may fail.

Workaround:
General setup:
1. Configure the RTC Mbus Bridge Timing Control register (offset 0x184A0)
   to value 0xFD4D4FFF
   Write RTC WRCLK Period to its maximum value (0x3FF)
   Write RTC WRCLK setup to 0x29
   Write RTC WRCLK High Time to 0x53 (default value)
   Write RTC Read Output Delay to its maximum value (0x1F)
   Mbus - Read All Byte Enable to 0x1 (default value)
2. Configure the RTC Test Configuration Register (offset 0xA381C) bit3
   to '1' (Reserved, Marvell internal)

For any RTC register read operation:
1. Read the requested register 100 times.
2. Find the result that appears most frequently and use this result
   as the correct value.

For any RTC register write operation:
1. Issue two dummy writes of 0x0 to the RTC Status register (offset
   0xA3800).
2. Write the time to the RTC Time register (offset 0xA380C).

This patch is based on the work of Shaker Daibes

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rtc: Fix module autoload for OF platform drivers</title>
<updated>2015-09-05T17:37:22+00:00</updated>
<author>
<name>Javier Martinez Canillas</name>
<email>javier@osg.samsung.com</email>
</author>
<published>2015-08-27T11:52:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=73798d5c41fdb434ccbeeec76afc8106869a98c3'/>
<id>73798d5c41fdb434ccbeeec76afc8106869a98c3</id>
<content type='text'>
These platform drivers have a OF device ID table but the OF module
alias information is not created so module autoloading won't work.

Signed-off-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Acked-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These platform drivers have a OF device ID table but the OF module
alias information is not created so module autoloading won't work.

Signed-off-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Acked-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rtc: armada38x: Align RTC set time procedure with the official errata</title>
<updated>2015-09-05T11:19:12+00:00</updated>
<author>
<name>Nadav Haklai</name>
<email>nadavh@marvell.com</email>
</author>
<published>2015-08-06T15:18:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0c6e718389305cbc4cd9b8e3fd4b4173bd1127e6'/>
<id>0c6e718389305cbc4cd9b8e3fd4b4173bd1127e6</id>
<content type='text'>
According to the Armada38x functional errata FE-3124064, writing to
the RTC TIME register may fail. As a workaround, after writing to RTC
TIME register, issue a dummy write of 0x0 twice to the RTC Status
register.  This is the updated implementation of the Errata that
eliminates the need of the long 100ms delay during the RTC set time
procedure.

[gregory.clement@free-electrons.com]: removed the mutex and use the
spinlock again

Signed-off-by: Nadav Haklai &lt;nadavh@marvell.com&gt;
Reviewed-by: Neta Zur Hershkovits &lt;neta@marvell.com&gt;
Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
According to the Armada38x functional errata FE-3124064, writing to
the RTC TIME register may fail. As a workaround, after writing to RTC
TIME register, issue a dummy write of 0x0 twice to the RTC Status
register.  This is the updated implementation of the Errata that
eliminates the need of the long 100ms delay during the RTC set time
procedure.

[gregory.clement@free-electrons.com]: removed the mutex and use the
spinlock again

Signed-off-by: Nadav Haklai &lt;nadavh@marvell.com&gt;
Reviewed-by: Neta Zur Hershkovits &lt;neta@marvell.com&gt;
Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rtc: armada38x: Remove unused variable from armada38x_rtc_set_time()</title>
<updated>2015-07-17T22:42:31+00:00</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@freescale.com</email>
</author>
<published>2015-07-04T18:27:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d80238bbcad33218c8d34662f144dfb146c2d57b'/>
<id>d80238bbcad33218c8d34662f144dfb146c2d57b</id>
<content type='text'>
Remove the 'flags' variable in order to fix the following warning:

drivers/rtc/rtc-armada38x.c:91:22: warning: unused variable 'flags' [-Wunused-variable]

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove the 'flags' variable in order to fix the following warning:

drivers/rtc/rtc-armada38x.c:91:22: warning: unused variable 'flags' [-Wunused-variable]

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/rtc/rtc-armada38x.c: remove unused local `flags'</title>
<updated>2015-05-15T00:55:51+00:00</updated>
<author>
<name>Andrew Morton</name>
<email>akpm@linux-foundation.org</email>
</author>
<published>2015-05-14T22:16:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f98b733e93e00365b4df78fbb33c2cad3080f6bb'/>
<id>f98b733e93e00365b4df78fbb33c2cad3080f6bb</id>
<content type='text'>
Reported-by: Fengguang Wu &lt;fengguang.wu@gmail.com&gt;
Cc: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Reported-by: Fengguang Wu &lt;fengguang.wu@gmail.com&gt;
Cc: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
