linux-toradex.git/drivers/sh/clk, branch v3.6.1

sh: clkfwk: Consolidate div clk registration helper.

2012-05-25T07:55:05+00:00

This consolidates the div6/4 versions of the clk registration wrapper.
The existing wrappers with their own sh_clk_ops are maintained for API
compatability, though in the future it should be possible to be rid of
them entirely.

Signed-off-by: Paul Mundt

sh: clkfwk: Consolidate div6/div4 clk_ops definitions.

2012-05-25T07:43:42+00:00

Everything with the exception of the _reparent ops are now shared, so
switch everything over to common types.

Signed-off-by: Paul Mundt

sh: clkfwk: Use shared sh_clk_div_enable/disable().

2012-05-25T07:34:48+00:00

This introduces a new flag for clocks that need to have their divisor
ratio set back to their initial mask at disable time to prevent
interactivity problems with the clock stop bit (presently div6 only).
With this in place it's possible to handle the corner case on top of the
div4 op without any particular need for leaving things split out.

Signed-off-by: Paul Mundt

sh: clkfwk: Use shared sh_clk_div_set_rate()

2012-05-25T06:52:10+00:00

Follows the sh_clk_div_recalc() change.

Signed-off-by: Paul Mundt

sh: clkfwk: Use shared sh_clk_div_recalc().

2012-05-25T06:26:01+00:00

This generalizes the div4 recalc routine for use by div6 and others, then
makes it the default.

Signed-off-by: Paul Mundt

sh: clkfwk: Introduce a div_mask for variable div types.

2012-05-25T06:21:43+00:00

This plugs in a div_mask for the clock and sets it up for the existing
div6/4 cases. This will make it possible to support other div types, as
well as share more div6/4 infrastructure.

Signed-off-by: Paul Mundt

sh: clkfwk: Move to common clk_div_table accessors for div4/div6.

2012-05-25T05:59:26+00:00

This plugs in a generic clk_div_table, based on the div4 version. div6 is
then adopted to use it for encapsulating its div table, which permits us
to start div6/4 unification, as well as preparation for other div types.

Signed-off-by: Paul Mundt

sh: clkfwk: Support variable size accesses for div4/div6 clocks.

2012-04-12T10:50:40+00:00

This follows the MSTP clock change and implements variable access size
support for the rest of the CPG clocks, too. Upcoming SH-2A support has
need of this for 16-bit div4 clocks, while others will follow.

Signed-off-by: Paul Mundt

sh: clkfwk: Support variable size accesses for MSTP clocks.

2012-04-11T03:05:50+00:00

The bulk of the MSTP users require 32-bit access, but this isn't the case
for some of the SH-2A parts, so add in some basic infrastructure to let
the CPU define its required access size in preparation.

Requested-by: Phil Edworthy 
Signed-off-by: Paul Mundt

sh: convert cpg code to sh_clk_ops

2012-03-12T21:19:07+00:00

Convert the CPG code to use sh_clk_ops.

Signed-off-by: Magnus Damm 
Signed-off-by: Rafael J. Wysocki