linux-toradex.git/drivers/soc/imx, branch v5.16-rc5

soc: imx: imx8m-blk-ctrl: off by one in imx8m_blk_ctrl_xlate()

2021-10-15T03:10:05+00:00

The > comparison should be >= to prevent reading one element beyond the
end of the array.  The onecell_data->domains[] array is allocated in
imx8m_blk_ctrl_probe() and it has "onecell_data->num_domains" elements.

Fixes: 5b340e7813d4 ("soc: imx: add i.MX8M blk-ctrl driver")
Signed-off-by: Dan Carpenter 
Reviewed-by: Lucas Stach 
Signed-off-by: Shawn Guo

soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl

2021-10-06T12:13:51+00:00

This adds the description for the i.MX8MM disp blk-ctrl.

Signed-off-by: Lucas Stach 
Reviewed-by: Peng Fan 
Signed-off-by: Shawn Guo

soc: imx: add i.MX8M blk-ctrl driver

2021-10-06T12:13:47+00:00

This adds a driver for the blk-ctrl blocks found in the i.MX8M* line of
SoCs. The blk-ctrl is a top-level peripheral located in the various *MIX
power domains and interacts with the GPC power controller to provide the
peripherals in the power domain access to the NoC and ensures that those
peripherals are properly reset when their respective power domain is
brought back to life.

Software needs to do different things to make the bus handshake happen
after the GPC *MIX domain is powered up and before it is powered down.
As the requirements are quite different between the various blk-ctrls
there is a callback function provided to hook in the proper sequence.

The peripheral domains are quite uniform, they handle the soft clock
enables and resets in the blk-ctrl address space and sequencing with the
upstream GPC power domains.

Signed-off-by: Lucas Stach 
Acked-by: Frieder Schrempf 
Reviewed-by: Philipp Zabel 
Signed-off-by: Shawn Guo

soc: imx: gpcv2: support system suspend/resume

2021-10-06T12:13:45+00:00

Our usage of runtime PM to control the hierarchy of power domains is
slightly unusual and means that powering up a domain may fail in early
system resume, as runtime PM is still disallowed at this stage.

However the system suspend/resume path takes care of powering down/up
the power domains in the order defined by the device parent/child and
power-domain provider/consumer hierarachy. So we can just runtime
resume all our power-domain devices to allow the power-up to work
properly in the resume path. System suspend will still disable all
domains as intended.

Signed-off-by: Lucas Stach 
Acked-by: Peng Fan 
Signed-off-by: Shawn Guo

soc: imx: gpcv2: keep i.MX8M* bus clocks enabled

2021-10-06T12:13:42+00:00

Annotate the domains with bus clocks to keep those clocks enabled
as long as the domain is active.

Signed-off-by: Lucas Stach 
Reviewed-by: Peng Fan 
Signed-off-by: Shawn Guo

soc: imx: gpcv2: add domain option to keep domain clocks enabled

2021-10-06T12:13:39+00:00

Some of the MIX domains are using clocks to drive the bus bridges. Those
must be enabled at all times, as long as the domain is powered up and
they don't have any other consumer than the power domain. Add an option
to keep the clocks attached to a domain enabled as long as the domain
is power up and only disable them after the domain is powered down.

Signed-off-by: Lucas Stach 
Reviewed-by: Peng Fan 
Signed-off-by: Shawn Guo

soc: imx: gpcv2: add lockdep annotation

2021-10-06T12:13:23+00:00

Some of the GPCv2 power domains are nested inside each other without
visibility to lockdep at the genpd level, as they are in separate
driver instances and don't have a parent/child power-domain relationship.

Add a subclass annotation to the nested domains to let lockdep know that
it is okay to take the genpd lock in a nested fashion.

Signed-off-by: Lucas Stach 
Reviewed-by: Peng Fan 
Signed-off-by: Shawn Guo

Revert "soc: imx: gpcv2: move reset assert after requesting domain power up"

2021-10-05T06:29:19+00:00

This reverts commit a77ebdd9f553. It turns out that the VPU domain has no
different requirements, even though the downstream ATF implementation seems
to suggest otherwise. Powering on the domain with the reset asserted works
fine. As the changed sequence has caused sporadic issues with the GPU
domains, just revert the change to go back to the working sequence.

Cc:  # 5.14
Signed-off-by: Lucas Stach 
Acked-by: Peng Fan 
Tested-by: Adam Ford  #imx8mm-beacon
Signed-off-by: Shawn Guo

soc: imx: gpcv2: allow to disable individual power domains

2021-10-05T06:27:52+00:00

Some board designs don't supply power to all of the power domains,
as they are not used anyways. In that case we must make sure to
not touch those power domains at all, as trying to power up a
domain that has no power supplied to it will obviously end in a
system crash. Allow to disable those domains via the standard DT
status property.

Signed-off-by: Lucas Stach 
Reviewed-By: Tim Harvey 
Tested-By: Tim Harvey 
Signed-off-by: Shawn Guo

imx: soc: Select REGMAP_MMIO

2021-10-05T05:54:44+00:00

The imx-gpcv2 driver needs Regmap MMIO. Select it, and fix:

drivers/soc/imx/gpcv2.c:420:34: error: array type has incomplete element type ‘struct regmap_range’
  420 | static const struct regmap_range imx7_yes_ranges[] = {
      |                                  ^~~~~~~~~~~~~~~
drivers/soc/imx/gpcv2.c:421:17: error: implicit declaration of function ‘regmap_reg_range’; did you mean ‘remap_pfn_range’? [-Werror=implicit-function-declaration]
  421 |                 regmap_reg_range(GPC_LPCR_A_CORE_BSC,
      |                 ^~~~~~~~~~~~~~~~
      |                 remap_pfn_range

Signed-off-by: Ezequiel Garcia 
Signed-off-by: Shawn Guo