linux-toradex.git/drivers/soc/qcom, branch v5.14 Linux kernel for Apalis and Colibri modules Merge tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 2021-07-10T16:46:20+00:00 Linus Torvalds torvalds@linux-foundation.org 2021-07-10T16:46:20+00:00 071e5aceebebf1d33b5c29ccfd2688ed39c60007 Pull ARM driver updates from Olof Johansson: - Reset controllers: Adding support for Microchip Sparx5 Switch. - Memory controllers: ARM Primecell PL35x SMC memory controller driver cleanups and improvements. - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN. - Rockchip: RK3568 power domains support + DT binding updates, cleanups. - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details, including support for MSM8226, MDM9607, SM6125 and SC8180X. - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management interfaces and communication (including bus model) between partitions both in Normal and Secure Worlds. - Tegra Memory controller changes, including major rework to deal with identity mappings at boot and integration with ARM SMMU pieces. * tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits) firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string firmware: turris-mox-rwtm: show message about HWRNG registration firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng firmware: turris-mox-rwtm: report failures better firmware: turris-mox-rwtm: fix reply status decoding function soc: imx: gpcv2: add support for i.MX8MN power domains dt-bindings: add defines for i.MX8MN power domains firmware: tegra: bpmp: Fix Tegra234-only builds iommu/arm-smmu: Use Tegra implementation on Tegra186 iommu/arm-smmu: tegra: Implement SID override programming iommu/arm-smmu: tegra: Detect number of instances at runtime dt-bindings: arm-smmu: Add Tegra186 compatible string firmware: qcom_scm: Add MDM9607 compatible soc: qcom: rpmpd: Add MDM9607 RPM Power Domains soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml memory: emif: remove unused frequency and voltage notifiers memory: fsl_ifc: fix leak of private memory on probe failure memory: fsl_ifc: fix leak of IO mapping on probe failure ... 
Pull ARM driver updates from Olof Johansson:

 - Reset controllers: Adding support for Microchip Sparx5 Switch.

 - Memory controllers: ARM Primecell PL35x SMC memory controller driver
   cleanups and improvements.

 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.

 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.

 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.

 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management
   interfaces and communication (including bus model) between partitions
   both in Normal and Secure Worlds.

 - Tegra Memory controller changes, including major rework to deal with
   identity mappings at boot and integration with ARM SMMU pieces.

* tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits)
  firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
  firmware: turris-mox-rwtm: show message about HWRNG registration
  firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
  firmware: turris-mox-rwtm: report failures better
  firmware: turris-mox-rwtm: fix reply status decoding function
  soc: imx: gpcv2: add support for i.MX8MN power domains
  dt-bindings: add defines for i.MX8MN power domains
  firmware: tegra: bpmp: Fix Tegra234-only builds
  iommu/arm-smmu: Use Tegra implementation on Tegra186
  iommu/arm-smmu: tegra: Implement SID override programming
  iommu/arm-smmu: tegra: Detect number of instances at runtime
  dt-bindings: arm-smmu: Add Tegra186 compatible string
  firmware: qcom_scm: Add MDM9607 compatible
  soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
  soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
  soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
  dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
  memory: emif: remove unused frequency and voltage notifiers
  memory: fsl_ifc: fix leak of private memory on probe failure
  memory: fsl_ifc: fix leak of IO mapping on probe failure
  ...
soc: qcom: smem_state: Add devm_qcom_smem_state_get() 2021-06-23T18:35:12+00:00 Stephan Gerhold stephan@gerhold.net 2021-06-18T11:15:54+00:00 61d1961adf4bd57d1b2c6d94d97323263c470cb2 It is easy to forget to call qcom_smem_state_put() after a qcom_smem_state_get(). Introduce a devm_qcom_smem_state_get() helper function that automates this so that qcom_smem_state_put() is automatically called when a device is removed. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210618111556.53416-1-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> 
It is easy to forget to call qcom_smem_state_put() after
a qcom_smem_state_get(). Introduce a devm_qcom_smem_state_get()
helper function that automates this so that qcom_smem_state_put()
is automatically called when a device is removed.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210618111556.53416-1-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
soc: qcom: rpmpd: Add MDM9607 RPM Power Domains 2021-06-10T16:25:06+00:00 Konrad Dybcio konrad.dybcio@somainline.org 2021-01-31T01:32:32+00:00 af32011f76b759d68a6e3005d450ef7b82e1479a This SoC while being from 8916 era, makes use of the newer-style, floor-level management, instead of the older floor-corner. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210131013233.54666-1-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> 
This SoC while being from 8916 era, makes use of the
newer-style, floor-level management, instead of the older
floor-corner.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013233.54666-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
soc: qcom: smd-rpm: Add MSM8226 compatible 2021-05-31T23:29:14+00:00 Bartosz Dudziak bartosz.dudziak@snejp.pl 2021-05-02T12:20:25+00:00 d8ea59e7e3d166098e6ecb81f84e7f4c5760325c Add a compatible for the RPM on the Qualcomm MSM8226 platform. Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl> Link: https://lore.kernel.org/r/20210502122027.9351-3-bartosz.dudziak@snejp.pl Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> 
Add a compatible for the RPM on the Qualcomm MSM8226 platform.

Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
Link: https://lore.kernel.org/r/20210502122027.9351-3-bartosz.dudziak@snejp.pl
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
soc: qcom: socinfo: import PMIC IDs from pmic-spmi 2021-05-27T02:22:37+00:00 Luca Weiss luca@z3ntu.xyz 2021-05-26T20:08:43+00:00 7fda2b0bfbd98e554be9dbbdf930c34674438c85 The driver in drivers/mfd/qcom-spmi-pmic.c has a more complete and more up-to-date list of PMICs with the respective IDs. Use those names for socinfo. Some IDs seem to have been assigned to multiple PMICs so keep that in the name as well. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20210526200843.127916-1-luca@z3ntu.xyz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> 
The driver in drivers/mfd/qcom-spmi-pmic.c has a more complete and more
up-to-date list of PMICs with the respective IDs. Use those names for
socinfo. Some IDs seem to have been assigned to multiple PMICs so keep
that in the name as well.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20210526200843.127916-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
soc: qcom: socinfo: Add more IDs 2021-05-26T04:07:38+00:00 Luca Weiss luca@z3ntu.xyz 2021-05-04T20:36:13+00:00 9bf8257fefc9d14f589c2a933ba1193cc1912200 Add the IDs for the following families of chips: 8064, 8226, 8610, 8625Q Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20210504203612.95056-1-luca@z3ntu.xyz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> 
Add the IDs for the following families of chips: 8064, 8226, 8610, 8625Q

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20210504203612.95056-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
soc: qcom: rpmhpd: Add SC8180X 2021-05-26T04:07:38+00:00 Bjorn Andersson bjorn.andersson@linaro.org 2021-01-20T22:50:37+00:00 3b1a0582482c81682960aafe69c87660e4fdf3be Add the power domains exposed by RPMH in the Qualcomm SC8180X platform. Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210120225037.1611353-2-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> 
Add the power domains exposed by RPMH in the Qualcomm SC8180X platform.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210120225037.1611353-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
soc: qcom: smd-rpm: Add SM6125 compatible 2021-05-26T04:07:38+00:00 Martin Botka martin.botka@somainline.org 2021-05-23T21:15:52+00:00 055c9aff76b776634b1ee50397d65f8fe1550c1a Add a compatible for SM6125 Signed-off-by: Martin Botka <martin.botka@somainline.org> Link: https://lore.kernel.org/r/20210523211556.731976-1-martin.botka@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> 
Add a compatible for SM6125

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210523211556.731976-1-martin.botka@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
soc: qcom: socinfo: Add remaining IPQ6018 family ID-s 2021-05-26T04:07:38+00:00 Robert Marko robert.marko@sartura.hr 2021-05-17T12:00:34+00:00 e365257547ec789a8b54e7b33bbb9e0f5506de74 ID for IPQ6018 was previously added, but ID-s for rest of the family are missing. So, lets add those based on downstream driver. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Kathiravan T <kathirav@codeaurora.org> Link: https://lore.kernel.org/r/20210517120034.3975027-1-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> 
ID for IPQ6018 was previously added, but ID-s for rest of the
family are missing.
So, lets add those based on downstream driver.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Kathiravan T <kathirav@codeaurora.org>
Link: https://lore.kernel.org/r/20210517120034.3975027-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
soc: qcom: socinfo: Add missing SoC ID for SM6125 2021-05-26T04:07:33+00:00 Martin Botka martin.botka@somainline.org 2021-05-23T21:20:37+00:00 eec220565b7852d017f936fbc18a7864d2179593 Add SM6125 SoC ID to the soc_id struct Signed-off-by: Martin Botka <martin.botka@somainline.org> Link: https://lore.kernel.org/r/20210523212038.736445-2-martin.botka@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> 
Add SM6125 SoC ID to the soc_id struct

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210523212038.736445-2-martin.botka@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>