linux-toradex.git/drivers/soc/renesas, branch v4.19-rc5

Merge tag 'renesas-arm-soc2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

2018-07-21T21:19:37+00:00

Second Round of Renesas ARM Based SoC Updates for v4.19

* Always enable ARCH_TIMER on SoCs with A7 or A15

  All such SoCs have ARCH_TIMER so there is no need for it to be optional.
  This allows clean-up which is included in this change.

* Do not compile r8a7779_platform_cpu_kill when it is unused

  This avoids a warning by shuffling code into an existing #ifdef
  r8a7779 is the R-Car H1 SoC

* Add SMP enabler driver for the RZ/N1D (r9a06g032) SoC

  This is to allow SMP to be enabled via DT on the r9a06g032

* Stop compiling headsmp-apmu for non-SMP configs

  This is a minor clean-up allowing removal of an #ifdef

* tag 'renesas-arm-soc2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
  ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
  soc: r9a06g032: don't build SMP files for non-SMP config
  ARM: shmobile: Add the R9A06G032 SMP enabler driver
  ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMP

Signed-off-by: Olof Johansson

soc: r9a06g032: don't build SMP files for non-SMP config

2018-07-20T11:44:09+00:00

Without CONFIG_SMP, we get a build failure:

In file included from include/linux/byteorder/little_endian.h:5,
                 from arch/arm/include/uapi/asm/byteorder.h:22,
                 from include/asm-generic/bitops/le.h:6,
                 from arch/arm/include/asm/bitops.h:342,
                 from include/linux/bitops.h:18,
                 from include/linux/kernel.h:11,
                 from include/asm-generic/bug.h:18,
                 from arch/arm/include/asm/bug.h:60,
                 from include/linux/bug.h:5,
                 from include/linux/io.h:23,
                 from drivers/soc/renesas/r9a06g032-smp.c:11:
drivers/soc/renesas/r9a06g032-smp.c: In function 'r9a06g032_smp_boot_secondary':
drivers/soc/renesas/r9a06g032-smp.c:43:21: error: 'secondary_startup' undeclared (first use in this function)
  writel(__pa_symbol(secondary_startup), cpu_bootaddr);
                     ^~~~~~~~~~~~~~~~~

This makes the compilation of that file conditional on SMP support.
It would probably be better for consistency to leave that file
in arch/arm/mach-shmobile/, matching what we do for all other smp
operations.

Fixes: cde4f86f9249 ("arm: shmobile: Add the R9A06G032 SMP enabler driver")
Signed-off-by: Arnd Bergmann 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman

ARM: shmobile: Add the R9A06G032 SMP enabler driver

2018-07-20T11:44:04+00:00

The Renesas R9A06G032 second CA7 is parked in a ROM pen at boot time, it
equires a special enable method to get it started.

Signed-off-by: Michel Pollet 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman

Merge tag 'renesas-arm-soc-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

2018-07-02T17:10:43+00:00

Renesas ARM Based SoC Arm SoC Updates for v4.19

* Convert to SPDX identifier

* Remove legacy SMP fallback code for R-CAR H2 and M2-W
  - DT enablement has been in since 4.8, no longer needed

* APMU cleanups after legacy SMP fallback removal

* Drop legacy SYSC fallback code for R-Car H1, H2 and M2-W
  - DT enablement has been in since 4.7, no longer needed.

* tag 'renesas-arm-soc-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: convert to SPDX identifier
  soc: renesas: rcar-sysc: Drop legacy handling
  ARM: shmobile: r8a7779: Remove explicit SYSC config and init
  ARM: shmobile: r8a7779: Use rcar_sysc_power_{down,up}_cpu()
  soc: renesas: rcar-sysc: Provide helpers to power up/down CPUs
  ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot
  ARM: shmobile: rcar-gen2: Remove explicit SYSC config and init
  ARM: shmobile: apmu: Remove platsmp-apmu.h
  ARM: shmobile: apmu: Remove obsolete shmobile_smp_apmu_prepare_cpus()
  ARM: shmobile: apmu: Move cpu_leave_lowpower() to SUSPEND section
  ARM: shmobile: Remove unused shmobile_smp_init_fallback_ops()
  ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definition
  ARM: shmobile: r8a7791: Remove legacy SMP fallback code
  ARM: shmobile: r8a7790: Use common R-Car Gen2 machine definition
  ARM: shmobile: r8a7790: Remove legacy SMP fallback code

Signed-off-by: Olof Johansson

soc: renesas: rcar-sysc: Drop legacy handling

2018-06-18T10:00:29+00:00

Now the R-Car platform code no longer supports DTBs lacking a SYSC
device node in DT, all legacy handling can be dropped from the R-Car
SYSC driver:
  - Make rcar_sysc_ch private to the driver,
  - Make rcar_sysc_power_{down,up}() static (they have been replaced by
    rcar_sysc_power_{down,up}_cpu()),
  - Remove the legacy wrapper rcar_sysc_init(), and the check for double
    initialization (only the early_initcall is left).

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman

soc: renesas: rcar-sysc: Provide helpers to power up/down CPUs

2018-06-18T10:00:28+00:00

Provide helpers to control CPU power areas from platform code, taking
just a CPU index.  This will avoid having to pass full CPU power area
parameter blocks, and thus duplicating information already provided by
SoC-specific SYSC drivers.

This will be used on R-Car H1 only.
Later R-Car generations rely on APMU/RST for CPU power area control.

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman

soc: renesas: rcar-sysc: Make PM domain initialization more robust

2018-06-08T08:04:25+00:00

The quirk for R-Car E3 ES1.0 added in commit 086b399965a7ee7e ("soc:
renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}") makes the 3DG-A
PM domain a subdomain of the 3DG-B PM domain.  However, registering
3DG-A with its parent fails silently, as the 3DG-B PM domain hasn't been
registered yet, and such failures are never reported.

Fix this by:
  1. Splitting PM Domain initialization in two steps, so all PM domains
     are registered before any child-parent links are established,
  2. Reporting any failures in establishing child-parent relations.

Check for and report pm_genpd_init() failures, too, as that function
gained a return value in commit 7eb231c337e00735 ("PM / Domains: Convert
pm_genpd_init() to return an error code").

Fixes: 086b399965a7ee7e ("soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}")
Signed-off-by: Geert Uytterhoeven 
Tested-by: Yoshihiro Shimoda 
Reviewed-by: Ulf Hansson 
Signed-off-by: Simon Horman

soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}

2018-05-16T08:57:44+00:00

This patch adds workaround for 3DG-{A,B} of R-Car E3 ES1.0 because
the SoC has a restriction about the order.

Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman

soc: renesas: rcar-sysc: Add support for R-Car E3 power areas

2018-05-16T08:57:13+00:00

This patch adds Cortex-A53 CPU{0,1}, Cortex-A53 SCU, Cortex-R7, A3VC,
A2VC1 and 3DG-{A,B} power domain areas for the R8A77990 SoC.

Signed-off-by: Takeshi Kihara 
[shimoda: fix 3DG-{A,B} and add SPDX-License-Identifier]
Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman

soc: renesas: r8a77995-sysc: Cleanups

2018-04-20T10:14:47+00:00

Minor cleanup of artefacts caused by deriving from r8a7795-sysc.c:
  - Remove unused inclusion of ,
  - Make r8a77995_areas[] const.

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman