linux-toradex.git/drivers/soc/samsung, branch v5.3.2

soc: samsung: pm_domains: Deprecate support for clocks

2018-04-17T15:25:42+00:00

Handling of special clock operations on power domain on/off sequences has
been moved to respective Exynos clock controller drivers, so there is no
need to keep the duplicated (and conflicting) code in Exynos power domain
driver. Mark clock related properties in Exynos power domain bindings as
deprecated. This change has no inpact on backwards-compatibility, as the
new drivers properly work with old DTBs (deprecated properties are
ignored).

Signed-off-by: Marek Szyprowski 
Signed-off-by: Krzysztof Kozlowski

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2018-04-13T22:51:06+00:00

Pull clk updates from Stephen Boyd:
 "The large diff this time around is from the addition of a new clk
  driver for the TI Davinci family of SoCs. So far those clks have been
  supported with a custom implementation of the clk API in the arch port
  instead of in the CCF. With this driver merged we're one step closer
  to having a single clk API implementation.

  The other large diff is from the Amlogic clk driver that underwent
  some major surgery to use regmap. Beyond that, the biggest hitter is
  Samsung which needed some reworks to properly handle clk provider
  power domains and a bunch of PLL rate updates.

  The core framework was fairly quiet this round, just getting some
  cleanups and small fixes for some of the more esoteric features. And
  the usual set of driver non-critical fixes, cleanups, and minor
  additions are here as well.

  Core:
   - Rejig clk_ops::init() to be a little earlier for phase/accuracy ops
   - debugfs ops macroized to shave some lines of boilerplate code
   - Always calculate the phase instead of caching it in clk_get_phase()
   - More __must_check on bulk clk APIs

  New Drivers:
   - TI's Davinci family of SoCs
   - Intel's Stratix10 SoC
   - stm32mp157 SoC
   - Allwinner H6 CCU
   - Silicon Labs SI544 clock generator chip
   - Renesas R-Car M3-N and V3H SoCs
   - i.MX6SLL SoCs

  Removed Drivers:
   - ST-Ericsson AB8540/9540

  Updates:
   - Mediatek MT2701 and MT7622 audsys support and MT2712 updates
   - STM32F469 DSI and STM32F769 sdmmc2 support
   - GPIO clks can sleep now
   - Spreadtrum SC9860 RTC clks
   - Nvidia Tegra MBIST workarounds and various minor fixes
   - Rockchip phase handling fixes and a memory leak plugged
   - Renesas drivers switch to readl/writel from clk_readl/clk_writel
   - Renesas gained CPU (Z/Z2) and watchdog support
   - Rockchip rk3328 display clks and rk3399 1.6GHz PLL support
   - Qualcomm PM8921 PMIC XO buffers
   - Amlogic migrates to regmap APIs
   - TI Keystone clk latching support
   - Allwinner H3 and H5 video clk fixes
   - Broadcom BCM2835 PLLs needed another bit to enable
   - i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix
   - i.MX6UL/ULL epdc_podf support
   - Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (233 commits)
  clk: davinci: add a reset lookup table for psc0
  clk: imx: add clock driver for imx6sll
  dt-bindings: imx: update clock doc for imx6sll
  clk: imx: add new gate/gate2 wrapper funtion
  clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux
  clk: cs2000: set pm_ops in hibernate-compatible way
  clk: bcm2835: De-assert/assert PLL reset signal when appropriate
  clk: imx7d: Move clks_init_on before any clock operations
  clk: imx7d: Correct ahb clk parent select
  clk: imx7d: Correct dram pll type
  clk: imx7d: Add USB clock information
  clk: socfpga: stratix10: add clock driver for Stratix10 platform
  dt-bindings: documentation: add clock bindings information for Stratix10
  clk: ti: fix flag space conflict with clkctrl clocks
  clk: uniphier: add additional ethernet clock lines for Pro4
  clk: uniphier: add SATA clock control support
  clk: uniphier: add PCIe clock control support
  clk: Add driver for the si544 clock generator chip
  clk: davinci: Remove redundant dev_err calls
  clk: uniphier: add ethernet clock control support for PXs3
  ...

clk: samsung: exynos5250: Move PD-dependent clocks to Exynos5 sub-CMU

2018-03-06T16:39:40+00:00

Clocks related to DISP1 block require special handling for power domain
turn on/off sequences. Till now this was handled by Exynos power domain
driver, but that approach was limited only to some special cases. This
patch moves handling of those operations to clock controller driver.
This gives more flexibility and allows fine tune values of some
clock-specific registers. This patch moves handling of those mentioned
clocks to Exynos5 sub-CMU driver instantiated from Exynos5250 driver.

Signed-off-by: Marek Szyprowski 
Acked-by: Krzysztof Kozlowski 
Signed-off-by: Sylwester Nawrocki

clk: samsung: exynos5420: Move PD-dependent clocks to Exynos5 sub-CMU

2018-03-06T16:39:16+00:00

Clocks related to DISP, GSC and MFC blocks require special handling for
power domain turn on/off sequences. Till now this was handled by Exynos
power domain driver, but that approach was limited only to some special
cases. This patch moves handling of those operations to clock controller
driver. This gives more flexibility and allows fine tune values of some
clock-specific registers. This patch moves handling of those mentioned
clocks to Exynos5 sub-CMU driver instantiated from Exynos5420 driver.

Signed-off-by: Marek Szyprowski 
Acked-by: Krzysztof Kozlowski 
Signed-off-by: Sylwester Nawrocki

soc: samsung: pm_domains: Add blacklisting clock handling

2018-03-06T16:33:37+00:00

Handling of clock reparenting will be move to clock controller driver,
so add possibility to blacklist clock handling on systems, where the
clock controller already does all needed operations. This is needed
to avoid potential deadlock on clock reparenting during power domain
on/off procedure.

Signed-off-by: Marek Szyprowski 
Reviewed-by: Krzysztof Kozlowski 
Signed-off-by: Sylwester Nawrocki

soc: samsung: pmu: Populate children syscon nodes

2018-02-13T17:47:25+00:00

The syscon poweroff and restart nodes logically belong to the Power
Management Unit so populate possible children.

This also requires providing compatibles for Exynos5410 and Exynos7 so
the PMU device and its children will be instantiated for them as well.
Just like Exynos5433, these chipsets are not yet supported by the PMU
driver.

Signed-off-by: Krzysztof Kozlowski 
Reviewed-by: Rob Herring 
Tested-by: Marek Szyprowski

soc: samsung: Add SPDX license identifiers

2018-01-03T17:45:15+00:00

Replace GPL license statements with SPDX GPL-2.0 license identifiers.

Signed-off-by: Krzysztof Kozlowski

soc: samsung: Remove Exynos4212 related dead code

2017-10-08T12:17:13+00:00

Support for Exynos4212 SoCs has been removed by commit bca9085e0ae9 ("ARM:
dts: exynos: remove Exynos4212 support (dead code)"), so there is no need
to keep remaining dead code related to this SoC version.

Signed-off-by: Marek Szyprowski 
Signed-off-by: Krzysztof Kozlowski

Merge tag 'samsung-drivers-4.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers

2017-08-23T19:46:12+00:00

Pull "Samsung soc drivers changes for v4.14" from Krzysztof Kozłowski:

Conversion to kbasename from Rob Herring.

* tag 'samsung-drivers-4.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: Use kbasename instead of open coding

soc: Convert to using %pOF instead of full_name

2017-08-16T19:32:36+00:00

Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.

Signed-off-by: Rob Herring 
Acked-by: Krzysztof Kozlowski 
Reviewed-by: Geert Uytterhoeven 
Acked-by: Matthias Brugger 
Acked-by: Simon Horman 
Cc: Scott Wood 
Cc: Qiang Zhao 
Cc: Magnus Damm 
Cc: Kukjin Kim 
Cc: Javier Martinez Canillas 
Signed-off-by: Arnd Bergmann