<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/soc/tegra, branch master</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2026-10-22T17:52:50+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-10-22T17:52:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2e51c645fee243dbcb5cee3eb063b5713317444c'/>
<id>2e51c645fee243dbcb5cee3eb063b5713317444c</id>
<content type='text'>
Pull SoC driver updates from Arnd Bergmann:
 "There are lots of minor updates for driver subsystems managed through
  the soc tree (turris-omnia platform, cache driver, tee drivers,
  arm-cci, bus, memory) as well as soc vendor specific drivers
  (starfive, xilinx, microchip, nxp, amlogic, imx, renesas, samsung, ti,
  nvidia).

  The more notable changes are:

   - Larger updates for Qualcomm SoCs including support for SM8950
     (Maili) SM8975 (Hawi), Glymur, Shikra, and IPQ5424

   - Added SoC support for Exynos5515, Tegra264, Tegra410, R8A774A3, and
     MT8167 in existing drivers

   - Arm SCMI firmware driver support for ACPI PCC transport and module
     autoloading of protocol specific drivers

   - Apple crash log support for CrgA embedded controller"

* tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (176 commits)
  platform: cznic: turris-omnia-mcu: stop button emulation producers
  cache: Make cpu_cache_invalidate_memregion() error out if there are no handlers
  soc: mpfs: use kref cleanup on probe failure
  arm64: enable HAVE_SHARED_GPIOS for all ARM64 platforms
  bus: arm-cci: Drop cci-control-port node reference in __cci_ace_get_port()
  bus: arm-cci: Drop CPU node reference in cci_ace_init_ports()
  soc: fsl: dpio: Free the IRQ before releasing the I/O object
  soc: fsl: dpio: Fix cleanup on IRQ registration failure
  bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
  bus: fsl-mc: drop the fwnode links of the dpmacs nodes
  soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
  soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
  firmware: qcom: scm: Allow QSEECOM on ThinkPad T14s Gen 7
  dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller
  dt-bindings: spmi: glymur-spmi-pmic-arb: Add compatible for Qualcomm Maili SoC
  soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
  ASoC: dt-bindings: qcom,apr: Add modem_apps GLINK channel for shikra
  firmware: qcom: tzmem: disable SHM bridge for SM7125 platform
  soc: qcom: ubwc: Add Kalambo UBWC config
  firmware: qcom: scm: Allow QSEECOM on Kalambo CRD
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull SoC driver updates from Arnd Bergmann:
 "There are lots of minor updates for driver subsystems managed through
  the soc tree (turris-omnia platform, cache driver, tee drivers,
  arm-cci, bus, memory) as well as soc vendor specific drivers
  (starfive, xilinx, microchip, nxp, amlogic, imx, renesas, samsung, ti,
  nvidia).

  The more notable changes are:

   - Larger updates for Qualcomm SoCs including support for SM8950
     (Maili) SM8975 (Hawi), Glymur, Shikra, and IPQ5424

   - Added SoC support for Exynos5515, Tegra264, Tegra410, R8A774A3, and
     MT8167 in existing drivers

   - Arm SCMI firmware driver support for ACPI PCC transport and module
     autoloading of protocol specific drivers

   - Apple crash log support for CrgA embedded controller"

* tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (176 commits)
  platform: cznic: turris-omnia-mcu: stop button emulation producers
  cache: Make cpu_cache_invalidate_memregion() error out if there are no handlers
  soc: mpfs: use kref cleanup on probe failure
  arm64: enable HAVE_SHARED_GPIOS for all ARM64 platforms
  bus: arm-cci: Drop cci-control-port node reference in __cci_ace_get_port()
  bus: arm-cci: Drop CPU node reference in cci_ace_init_ports()
  soc: fsl: dpio: Free the IRQ before releasing the I/O object
  soc: fsl: dpio: Fix cleanup on IRQ registration failure
  bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
  bus: fsl-mc: drop the fwnode links of the dpmacs nodes
  soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
  soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
  firmware: qcom: scm: Allow QSEECOM on ThinkPad T14s Gen 7
  dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller
  dt-bindings: spmi: glymur-spmi-pmic-arb: Add compatible for Qualcomm Maili SoC
  soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
  ASoC: dt-bindings: qcom,apr: Add modem_apps GLINK channel for shikra
  firmware: qcom: tzmem: disable SHM bridge for SM7125 platform
  soc: qcom: ubwc: Add Kalambo UBWC config
  firmware: qcom: scm: Allow QSEECOM on Kalambo CRD
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux</title>
<updated>2026-10-20T17:55:19+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-10-20T17:55:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=303bff3637d13f0ecbb280c7cb403470c440a2a6'/>
<id>303bff3637d13f0ecbb280c7cb403470c440a2a6</id>
<content type='text'>
Pull arm64 updates from Catalin Marinas:
 "Here are the arm64 updates for 7.4.

  The more interesting bits are the removal of big-endian kernel support
  (already marked BROKEN for some time), preemptible this_cpu_*()
  operations and MPAM support for the firmware-backed (Fb) interface.

  CCA (Arm's confidential compute) is slowly trickling in with host RMI
  (Realm Management Interface) support and some refactoring, including a
  dedicated SMCCC bus to advertise firmware services. There are also the
  usual PMU updates for new hardware and a few fixes/cleanups.

  Core features:

   - Remove big-endian kernel support: CONFIG_CPU_BIG_ENDIAN has
     depended on BROKEN for a while, so drop the remaining code (BE
     hypervisor object, BPF JIT, assembly/crypto/library routines,
     endianness helper macros, selftests) and force a little-endian
     build

   - Add preemptible this_cpu_*() operations (read/write, RMW, xchg,
     cmpxchg and cmpxchg128) that no longer need to disable preemption
     around the per-CPU address generation and access

   - Preparation patches for implementing CONFIG_HOTPLUG_PARALLEL on
     arm64

  Memory management:

   - Treat faults taken by EFI runtime firmware as kernel faults

   - Clear PTE_WRITE for EFI_MEMORY_RO mappings (with hardware dirty
     state management enabled, this is not truly read-only)

   - Raise the default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA
     configurations (28/26/24 bits for 4K/16K/64K pages)

   - Implement clear_page[s]() using memset()

   - Enable BBML2 no-abort (a.k.a. BBML3) for the NVIDIA Rigel CPU

  Perf and PMU:

   - Support for HiSilicon's ITS PMU

   - Add support for some new events: INST_SIMD_ALU_VEC for Apple PMUs
     and a cycle counter for the latest version of HiSilicon's MN PMU
     hardware

   - A bunch of fixes to the CXL PMU driver to address pre-existing
     issues from Sashiko

   - Fix generation of PERF_RECORD_ITRACE_START records for SPE and ETM
     drivers

   - Reduce excessive stack consumption in the Marvell DDR PMU driver

   - Minor driver updates and cleanups all over

  Arm Confidential Compute Architecture (CCA):

   - Add an Arm SMCCC bus for firmware services discovered through SMCCC
     and move the TRNG and CCA guest (TSM provider) drivers onto it,
     removing the dummy CCA platform device and adding a sysfs ABI for
     Realm guests

   - Move the Realm Service Interface (RSI) code out of arch/arm64/ into
     drivers/firmware/arm_rmm/

   - Add the host side of the Realm Management Interface (RMI): detect,
     configure and activate the RMM, add SRO support and wrappers for
     the Realm RMI commands

   - Block hibernation (new arch hook in the PM core) and kexec while
     the RMM is active. To be revisited in the future with proper
     support for deactivation

   - Handle Granule Protection Faults (GPFs) taken by the host, caused
     by accesses to memory delegated to the RMM. In a future patch, the
     exception table lookup will be limited to is_kdump_kernel() cases

  MPAM (Memory Partitioning And Monitoring):

   - Add support for the MPAM firmware-backed (Fb) interface, allowing
     MSC accesses to be mediated by firmware

   - Fix a list of theoretical issues with the driver (MSC access error
     propagation, MBWU monitor save/restore and locking, resctrl class
     handling, error interrupt restore, maximum number of PARTIDs)

   - Add the mailing list and a missing file to the MAINTAINERS entry

   - Document when to set arm64.nompam

  Errata and CPU features:

   - Add the NXP i.MX8QM/8QP workaround for the Cortex-A53 cache
     coherency issue (ERR050104), using a new ARM64_CPUCAP_SOC_ERRATUM
     capability type for SoC-level errata

  Miscellaneous:

   - Mask debug exceptions (DAIF) around the hardware breakpoint
     register manipulations when called from generic kernel code

   - Don't zero the SVE state buffer when the SVE state is live

   - Return -EPERM instead of -EBUSY from the GCS prctl() locking
     failures (matching x86), with the selftest updated. Slight ABI
     change but no software deployment yet

   - kselftest: fix unsound MTE fault skipping by introducing MTE-safe
     memory accessors, avoid copying each signal test binary more than
     once

   - Update sysreg definitions (fix three enum values and two field
     names, mark architecturally dropped fields as RES0) and remove the
     TME transaction state check from the BRBE driver

   - Fix the description of ARM64_HAS_LPA2 and remove a redundant
     ID_AA64MMFR0 define"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (144 commits)
  arm64: cpufeature: Enable BBML2 for NVIDIA Rigel
  arm64: cputype: Add NVIDIA Rigel definitions
  arm64: raise default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA
  arm64/debug: mask debug exceptions when called from common code
  kselftest/arm64: signal: copy each test binary only once
  kselftest/arm64: Check for -EPERM not -EBUSY in the locking test
  arm64: gcs: Return -EPERM not -EBUSY for prctl() locking failures
  perf: arm_brbe: Remove the check for TME transaction states
  arm64: sysreg: Mark fields the architecture dropped as RES0
  arm64: sysreg: Fix the names of two misspelt fields
  arm64: sysreg: Fix three incorrect enum values
  arm64: smp: Defer RCU registration during secondary CPU bringup
  arm64: smp: Don't bother printing the I-cache policy for each CPU
  arm64: smp: Defer update of secondary CPU capabilities
  arm64: smp: Tidy up cpuinfo init and cpufeature updates
  arm64: smp: Tidy up smp_prepare_cpus()
  arm64: cpufeature: Store every ID register with its overrides applied
  arm64: cpufeature: Read MPAMIDR_EL1 in __cpuinfo_store_cpu()
  arm64: cpufeature: Add read_cpuid_with_overrides()
  arm64: cpufeature: Check arm64_ftr_regs[] before the first store
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull arm64 updates from Catalin Marinas:
 "Here are the arm64 updates for 7.4.

  The more interesting bits are the removal of big-endian kernel support
  (already marked BROKEN for some time), preemptible this_cpu_*()
  operations and MPAM support for the firmware-backed (Fb) interface.

  CCA (Arm's confidential compute) is slowly trickling in with host RMI
  (Realm Management Interface) support and some refactoring, including a
  dedicated SMCCC bus to advertise firmware services. There are also the
  usual PMU updates for new hardware and a few fixes/cleanups.

  Core features:

   - Remove big-endian kernel support: CONFIG_CPU_BIG_ENDIAN has
     depended on BROKEN for a while, so drop the remaining code (BE
     hypervisor object, BPF JIT, assembly/crypto/library routines,
     endianness helper macros, selftests) and force a little-endian
     build

   - Add preemptible this_cpu_*() operations (read/write, RMW, xchg,
     cmpxchg and cmpxchg128) that no longer need to disable preemption
     around the per-CPU address generation and access

   - Preparation patches for implementing CONFIG_HOTPLUG_PARALLEL on
     arm64

  Memory management:

   - Treat faults taken by EFI runtime firmware as kernel faults

   - Clear PTE_WRITE for EFI_MEMORY_RO mappings (with hardware dirty
     state management enabled, this is not truly read-only)

   - Raise the default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA
     configurations (28/26/24 bits for 4K/16K/64K pages)

   - Implement clear_page[s]() using memset()

   - Enable BBML2 no-abort (a.k.a. BBML3) for the NVIDIA Rigel CPU

  Perf and PMU:

   - Support for HiSilicon's ITS PMU

   - Add support for some new events: INST_SIMD_ALU_VEC for Apple PMUs
     and a cycle counter for the latest version of HiSilicon's MN PMU
     hardware

   - A bunch of fixes to the CXL PMU driver to address pre-existing
     issues from Sashiko

   - Fix generation of PERF_RECORD_ITRACE_START records for SPE and ETM
     drivers

   - Reduce excessive stack consumption in the Marvell DDR PMU driver

   - Minor driver updates and cleanups all over

  Arm Confidential Compute Architecture (CCA):

   - Add an Arm SMCCC bus for firmware services discovered through SMCCC
     and move the TRNG and CCA guest (TSM provider) drivers onto it,
     removing the dummy CCA platform device and adding a sysfs ABI for
     Realm guests

   - Move the Realm Service Interface (RSI) code out of arch/arm64/ into
     drivers/firmware/arm_rmm/

   - Add the host side of the Realm Management Interface (RMI): detect,
     configure and activate the RMM, add SRO support and wrappers for
     the Realm RMI commands

   - Block hibernation (new arch hook in the PM core) and kexec while
     the RMM is active. To be revisited in the future with proper
     support for deactivation

   - Handle Granule Protection Faults (GPFs) taken by the host, caused
     by accesses to memory delegated to the RMM. In a future patch, the
     exception table lookup will be limited to is_kdump_kernel() cases

  MPAM (Memory Partitioning And Monitoring):

   - Add support for the MPAM firmware-backed (Fb) interface, allowing
     MSC accesses to be mediated by firmware

   - Fix a list of theoretical issues with the driver (MSC access error
     propagation, MBWU monitor save/restore and locking, resctrl class
     handling, error interrupt restore, maximum number of PARTIDs)

   - Add the mailing list and a missing file to the MAINTAINERS entry

   - Document when to set arm64.nompam

  Errata and CPU features:

   - Add the NXP i.MX8QM/8QP workaround for the Cortex-A53 cache
     coherency issue (ERR050104), using a new ARM64_CPUCAP_SOC_ERRATUM
     capability type for SoC-level errata

  Miscellaneous:

   - Mask debug exceptions (DAIF) around the hardware breakpoint
     register manipulations when called from generic kernel code

   - Don't zero the SVE state buffer when the SVE state is live

   - Return -EPERM instead of -EBUSY from the GCS prctl() locking
     failures (matching x86), with the selftest updated. Slight ABI
     change but no software deployment yet

   - kselftest: fix unsound MTE fault skipping by introducing MTE-safe
     memory accessors, avoid copying each signal test binary more than
     once

   - Update sysreg definitions (fix three enum values and two field
     names, mark architecturally dropped fields as RES0) and remove the
     TME transaction state check from the BRBE driver

   - Fix the description of ARM64_HAS_LPA2 and remove a redundant
     ID_AA64MMFR0 define"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (144 commits)
  arm64: cpufeature: Enable BBML2 for NVIDIA Rigel
  arm64: cputype: Add NVIDIA Rigel definitions
  arm64: raise default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA
  arm64/debug: mask debug exceptions when called from common code
  kselftest/arm64: signal: copy each test binary only once
  kselftest/arm64: Check for -EPERM not -EBUSY in the locking test
  arm64: gcs: Return -EPERM not -EBUSY for prctl() locking failures
  perf: arm_brbe: Remove the check for TME transaction states
  arm64: sysreg: Mark fields the architecture dropped as RES0
  arm64: sysreg: Fix the names of two misspelt fields
  arm64: sysreg: Fix three incorrect enum values
  arm64: smp: Defer RCU registration during secondary CPU bringup
  arm64: smp: Don't bother printing the I-cache policy for each CPU
  arm64: smp: Defer update of secondary CPU capabilities
  arm64: smp: Tidy up cpuinfo init and cpufeature updates
  arm64: smp: Tidy up smp_prepare_cpus()
  arm64: cpufeature: Store every ID register with its overrides applied
  arm64: cpufeature: Read MPAMIDR_EL1 in __cpuinfo_store_cpu()
  arm64: cpufeature: Add read_cpuid_with_overrides()
  arm64: cpufeature: Check arm64_ftr_regs[] before the first store
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: flowctrl: Release OF node reference on error</title>
<updated>2026-10-02T22:47:52+00:00</updated>
<author>
<name>Yuho Choi</name>
<email>dbgh9129@gmail.com</email>
</author>
<published>2026-08-01T23:50:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4eaed7ea6ab36e1160d660b05551702c36dfed6c'/>
<id>4eaed7ea6ab36e1160d660b05551702c36dfed6c</id>
<content type='text'>
tegra_flowctrl_init() obtains a reference from
of_find_matching_node() and currently releases it only after
of_address_to_resource() succeeds.

Release the reference before checking the resource conversion result so
the error path is balanced as well.

Fixes: 1fd09e5d884a ("soc/tegra: Add initial flowctrl support for Tegra132/210")
Signed-off-by: Yuho Choi &lt;dbgh9129@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
tegra_flowctrl_init() obtains a reference from
of_find_matching_node() and currently releases it only after
of_address_to_resource() succeeds.

Release the reference before checking the resource conversion result so
the error path is balanced as well.

Fixes: 1fd09e5d884a ("soc/tegra: Add initial flowctrl support for Tegra132/210")
Signed-off-by: Yuho Choi &lt;dbgh9129@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Make sure clk_init_data is fully initialized</title>
<updated>2026-10-02T22:42:12+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2026-08-21T08:52:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c842922f5ff229c9df2a2be56327c36aced7a3a7'/>
<id>c842922f5ff229c9df2a2be56327c36aced7a3a7</id>
<content type='text'>
The clk_init_data structure contains several mutually-exclusive members
for different methods to specify the possible parents of a clock,
prompting drivers to initialize only the members they need.  However,
not initializing all members may cause subtle issues, which are only
exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is
enabled.

Make sure all members are fully initialized, to avoid such bugs, and to
prevent future breakage when converting drivers to a different method
for specifying the parents.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Brian Masney &lt;bmasney@redhat.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The clk_init_data structure contains several mutually-exclusive members
for different methods to specify the possible parents of a clock,
prompting drivers to initialize only the members they need.  However,
not initializing all members may cause subtle issues, which are only
exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is
enabled.

Make sure all members are fully initialized, to avoid such bugs, and to
prevent future breakage when converting drivers to a different method
for specifying the parents.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Brian Masney &lt;bmasney@redhat.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: fuse: speedo-tegra210: Support revision B01</title>
<updated>2026-10-02T22:38:36+00:00</updated>
<author>
<name>Aaron Kling</name>
<email>webgeek1234@gmail.com</email>
</author>
<published>2026-07-28T01:57:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=968c438e7d28a2905571502ef103d06bd6c2c4ab'/>
<id>968c438e7d28a2905571502ef103d06bd6c2c4ab</id>
<content type='text'>
Tegra210B01 has a separate set of skus and speedo tables

Based-on: https://gitlab.com/nvidia/nv-tegra/linux-5.10/-/commit/8555ef4988d3b39d91791794825c354b3c9377ba
Based-on-patch-by: Alex Frid &lt;afrid@nvidia.com&gt;
Signed-off-by: Aaron Kling &lt;webgeek1234@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tegra210B01 has a separate set of skus and speedo tables

Based-on: https://gitlab.com/nvidia/nv-tegra/linux-5.10/-/commit/8555ef4988d3b39d91791794825c354b3c9377ba
Based-on-patch-by: Alex Frid &lt;afrid@nvidia.com&gt;
Signed-off-by: Aaron Kling &lt;webgeek1234@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Support revision B01</title>
<updated>2026-10-02T22:38:35+00:00</updated>
<author>
<name>Aaron Kling</name>
<email>webgeek1234@gmail.com</email>
</author>
<published>2026-07-28T01:57:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=98442683d8584feab37b1ae26c8ce31318790c44'/>
<id>98442683d8584feab37b1ae26c8ce31318790c44</id>
<content type='text'>
Previously, all supported SoCs only used the A major revision. The
Tegra210B01 SoC incremented the major revision. Add support for this.

Signed-off-by: Aaron Kling &lt;webgeek1234@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously, all supported SoCs only used the A major revision. The
Tegra210B01 SoC incremented the major revision. Add support for this.

Signed-off-by: Aaron Kling &lt;webgeek1234@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Add Tegra210B01 support</title>
<updated>2026-10-02T22:38:18+00:00</updated>
<author>
<name>Alexandre Hamamdjian</name>
<email>azkali.limited@gmail.com</email>
</author>
<published>2026-07-28T02:00:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4ccb980125b68964e90c05d7c6dbf3e804b93b32'/>
<id>4ccb980125b68964e90c05d7c6dbf3e804b93b32</id>
<content type='text'>
The PMC in Tegra210B01 is very similar to the one in the original
Tegra210, but has a few powergate differences. Specifically sata and ve2
are removed.

Signed-off-by: Alexandre Hamamdjian &lt;azkali.limited@gmail.com&gt;
Co-developed-by: Thomas Makin &lt;halorocker89@gmail.com&gt;
Signed-off-by: Thomas Makin &lt;halorocker89@gmail.com&gt;
Co-developed-by: Aaron Kling &lt;webgeek1234@gmail.com&gt;
Signed-off-by: Aaron Kling &lt;webgeek1234@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The PMC in Tegra210B01 is very similar to the one in the original
Tegra210, but has a few powergate differences. Specifically sata and ve2
are removed.

Signed-off-by: Alexandre Hamamdjian &lt;azkali.limited@gmail.com&gt;
Co-developed-by: Thomas Makin &lt;halorocker89@gmail.com&gt;
Signed-off-by: Thomas Makin &lt;halorocker89@gmail.com&gt;
Co-developed-by: Aaron Kling &lt;webgeek1234@gmail.com&gt;
Signed-off-by: Aaron Kling &lt;webgeek1234@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: cbb: Fix loggger -&gt; logger typo</title>
<updated>2026-10-02T22:17:12+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2026-10-02T09:16:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=72497e9692aae048166dd86e7b79c5a08b353b60'/>
<id>72497e9692aae048166dd86e7b79c5a08b353b60</id>
<content type='text'>
Found using codespell.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Found using codespell.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Add PCIe wake event for Tegra234</title>
<updated>2026-10-02T08:16:19+00:00</updated>
<author>
<name>Manikanta Maddireddy</name>
<email>mmaddireddy@nvidia.com</email>
</author>
<published>2026-09-07T11:31:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=60d42c6cde87da7bc065ad6c1f088964ae2d8b2d'/>
<id>60d42c6cde87da7bc065ad6c1f088964ae2d8b2d</id>
<content type='text'>
GPIO L.2 is used as the PCIe WAKE# signal on Tegra234 platforms.

Add the PMC wake event mapping so the GPIO interrupt can be armed
as a system wake source.

Signed-off-by: Manikanta Maddireddy &lt;mmaddireddy@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
GPIO L.2 is used as the PCIe WAKE# signal on Tegra234 platforms.

Add the PMC wake event mapping so the GPIO interrupt can be armed
as a system wake source.

Signed-off-by: Manikanta Maddireddy &lt;mmaddireddy@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: Kconfig: Simplify dependencies on ARM64 &amp;&amp; !CPU_BIG_ENDIAN</title>
<updated>2026-09-23T17:19:06+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2026-09-18T14:52:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d80ff69c9a3722c2b68b590efda7d9903cfe609e'/>
<id>d80ff69c9a3722c2b68b590efda7d9903cfe609e</id>
<content type='text'>
Now that arm64 no longer supports a big-endian kernel, simplify some
driver Kconfig entries so that the dependency on a little-endian kernel
no longer needs to be called out explicitly.

Reviewed-by: Michael Kelley &lt;mhklinux@outlook.com&gt; # Hyper-V
Suggested-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that arm64 no longer supports a big-endian kernel, simplify some
driver Kconfig entries so that the dependency on a little-endian kernel
no longer needs to be called out explicitly.

Reviewed-by: Michael Kelley &lt;mhklinux@outlook.com&gt; # Hyper-V
Suggested-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
