Pull LoongArch updates from Huacai Chen:

 - Add LoongArch-specific ACPI initialization

 - Set NX compat flag in PE/COFF efi header

 - Use pa_to_nid()/nid_to_addrbase() rather than hard-code

 - Detect and expose LAMCAS/DIV32 feature existence

 - Fix and improve perf hardware breakpoints

 - Fix and improve BPF JIT (trampoline and 32-bit operations)

 - Add arch_crash_save_vmcoreinfo() support

 - Some bug fixes and other small changes

* tag 'loongarch-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson: (24 commits)
  soc: loongson: loongson2_guts: Use of_root instead of own reference
  soc: loongson: loongson2_pm: Fix build warnings for 32BIT
  LoongArch: dts: loongson-2k0500: Drop unsupported bus_id in DWMAC
  LoongArch: BPF: Optimize 32-bit operations using native instructions
  LoongArch: BPF: Clean up and decouple is32 parameter from move_imm()
  LoongArch: BPF: Fix stack arguments for indirect trampolines
  LoongArch: Add arch_crash_save_vmcoreinfo() support
  LoongArch: Fix one-shot limitation for perf hardware breakpoints
  LoongArch: Fix perf hardware breakpoint failure via installation
  LoongArch: Only send SIGTRAP signal if necessary in do_watch()
  LoongArch: Fix architectural naming typo for CSR_FWPS_SKIP
  LoongArch: Fix bitmask corruption in update_bp_registers()
  LoongArch: Remove redundant call in update_bp_registers()
  LoongArch: Remove arch-specific __smp_mb__{before,after}_atomic()
  LoongArch: Detect and expose DIV32 feature existence
  LoongArch: Detect and expose LAMCAS feature existence
  LoongArch: Use pa_to_nid()/nid_to_addrbase() rather than hard-code
  LoongArch: Don't init & online empty nodes
  LoongArch: Call cpu_final_simd() with pure_initcall()
  LoongArch: Use assign_bit() API where applicable
  ...

Pull remoteproc updates from Bjorn Andersson:

 - Add Qualcomm QMI Thermal Mitigation Device support for PAS-managed
   remote processors, with cooling device bindings and configurations
   for Hamoa, Kodiak, Lemans, Talos, Monaco, and Shikra CDSP and modem
   subsystems as applicable.

 - Add per-power-domain proxy performance states for Hawi CDSP and
   update Hawi, Maili, and SDX75 PAS compatible bindings and the SDX75
   device tree. Correct the Qualcomm ADSP startup timeout.

 - Fetch auto-boot firmware only once and synchronize boot work with
   device removal. Bound ELF section header accesses, improve trace
   diagnostics, and update coredump configuration documentation.

 - Set 48-bit DMA masks for TI K3 DSP and R5 remote processors, correct
   mailbox message types, and enable compile testing for more TI
   drivers. Fix i.MX address range boundary checks and DSP runtime PM
   ordering, and simplify mailbox notification handling.

 - Harden Xilinx mailbox setup and teardown and avoid sending
   notifications when the transmit queue is full. Propagate STM32
   optional IRQ lookup errors and correct the MediaTek MT8188 SCP
   register binding.

* tag 'rproc-v7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (33 commits)
  remoteproc: qcom_q6v5_pas: Add QMI TMD cooling support for Shikra
  remoteproc: virtio: Remove stray white space
  remoteproc: virtio: Replace kmemdup with kmemdup_array
  remoteproc: virtio: Add vdev_to_rsc() helper
  remoteproc: core: Fetch the auto-boot firmware only once
  remoteproc: xlnx: fix typecast warnings
  remoteproc: qcom_q6v5_pas: enable QMI TMD cooling support
  remoteproc: qcom: pas: add support for TMD thermal cooling devices
  soc: qcom: Add QMI TMD support for remote thermal mitigation
  dt-bindings: remoteproc: qcom,pas: add #cooling-cells property
  remoteproc: qcom_q6v5_pas: add per-PD proxy performance states for Hawi CDSP
  dt-bindings: remoteproc: qcom,sm8550-pas: make qcom,hawi-cdsp-pas standalone
  arm64: dts: qcom: sdx75: Use SM8650 MPSS as fallback compatible
  dt-bindings: remoteproc: qcom,sm8550-pas: Make SDX75 MPSS fallback to SM8650
  dt-bindings: remoteproc: qcom,sm8550-pas: Add Hawi and Maili MPSS as SM8650 fallback
  dt-bindings: remoteproc: Fix MT8188 SCP regs
  remoteproc: Use %p for pointer formatting
  remoteproc: Add compile testing for additional TI drivers
  remoteproc: k3-dsp: Fix usage of omap_mbox_message and mbox_msg_t
  remoteproc: k3: Include what we need and only what we need
  ...

There is already a global of_root reference. Use that instead of getting
one on our own. We don't need to care about the reference count either
this way.

Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>

Since loongson_sysconf.suspend_addr is unsigned long, use "unsigned
long" instead of "u64" for casting, so as to avoid build warnings for
32BIT:

   drivers/soc/loongson/loongson2_pm.c: In function 'loongson2_pm_probe':
>> drivers/soc/loongson/loongson2_pm.c:178:49: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
     178 |                 loongson_sysconf.suspend_addr = (u64)phys_to_virt(suspend_addr);
         |

Cc: stable@vger.kernel.org
Fixes: 3d9aba6618d1 ("LoongArch: Adjust build infrastructure for 32BIT/64BIT")
Closes: https://lore.kernel.org/oe-kbuild-all/202610190549.WM2PO3vO-lkp@intel.com/
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>

Pull SoC driver updates from Arnd Bergmann:
 "There are lots of minor updates for driver subsystems managed through
  the soc tree (turris-omnia platform, cache driver, tee drivers,
  arm-cci, bus, memory) as well as soc vendor specific drivers
  (starfive, xilinx, microchip, nxp, amlogic, imx, renesas, samsung, ti,
  nvidia).

  The more notable changes are:

   - Larger updates for Qualcomm SoCs including support for SM8950
     (Maili) SM8975 (Hawi), Glymur, Shikra, and IPQ5424

   - Added SoC support for Exynos5515, Tegra264, Tegra410, R8A774A3, and
     MT8167 in existing drivers

   - Arm SCMI firmware driver support for ACPI PCC transport and module
     autoloading of protocol specific drivers

   - Apple crash log support for CrgA embedded controller"

* tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (176 commits)
  platform: cznic: turris-omnia-mcu: stop button emulation producers
  cache: Make cpu_cache_invalidate_memregion() error out if there are no handlers
  soc: mpfs: use kref cleanup on probe failure
  arm64: enable HAVE_SHARED_GPIOS for all ARM64 platforms
  bus: arm-cci: Drop cci-control-port node reference in __cci_ace_get_port()
  bus: arm-cci: Drop CPU node reference in cci_ace_init_ports()
  soc: fsl: dpio: Free the IRQ before releasing the I/O object
  soc: fsl: dpio: Fix cleanup on IRQ registration failure
  bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
  bus: fsl-mc: drop the fwnode links of the dpmacs nodes
  soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
  soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
  firmware: qcom: scm: Allow QSEECOM on ThinkPad T14s Gen 7
  dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller
  dt-bindings: spmi: glymur-spmi-pmic-arb: Add compatible for Qualcomm Maili SoC
  soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
  ASoC: dt-bindings: qcom,apr: Add modem_apps GLINK channel for shikra
  firmware: qcom: tzmem: disable SHM bridge for SM7125 platform
  soc: qcom: ubwc: Add Kalambo UBWC config
  firmware: qcom: scm: Allow QSEECOM on Kalambo CRD
  ...

Pull SoC devicetree updates from Arnd Bergmann:
 "This is a rather large update of over 1000 non-merge commits touching
  devicetree files and bindings.

  A few notable SoC were added this time:

   - Apple M4 and A18 Pro are used in laptops, these follow the M3 model
     added in 7.2.

   - Google Laguna (aka Tensor G5) is used last year's Pixel phone
     generation. Unlike the earlier Tensor chips, this is not based on
     Samsung's Exynos family design but starts a new chip family.

   - Qualcomm's Hawi and Nord SoCs are two powerful chips using the
     custom Oryon cores. Product names and applications are so far not
     known, which means that Qualcomm is doing something right by
     upstreaming kernel support early.

  The ST stm32mp23xc/stm32mp25xc SoC support was previously removed
  because there were no users upstream, but they are back now that
  boards have shown up. Renesas RZ/G2M v3.0 (R8A774A3) is just a minor
  variation of the already supported SoC.

  In total, there are 81 new dts files for individual boards, and they
  are all over the place. Only one riscv based machine is added, the
  Milk-V Meles SBC using the T-Head th1520 chip. For 32-bit Arm, we have
  13 new boards. About half are industrial embedded boards using NXP
  i.MX6/7 chips, the rest are older products: two Amazon tablets, two
  Motorola phones and two SoM boards.

  Everything else is 64-bit Arm:

   - many industrial embedded boards using NXP layerscape, NXP i.MX8/9,
     Qualcomm Hamoa, ST stm32mp2, Rockchip rk35xx, and Renesas RZ/G2
     SoCs

   - Laptops and tablets using Apple M4, Qualcomm Snapdragon X2,
     Snapdragon X1 Elite and Allwinner A133 chips

   - Valve Steam Frame VR headset using Snapdragon 8 Gen 3

   - Seven handheld game consoles using Qualcomm Dragonwing qcs8550

   - Mobile phones using Google Tensor G5, Samsung Exynos 850, and
     various Qualcomm Snapdragon chips

  Aside from the new stuff, there is still a lot going on for existing
  socs and boards, including GPU hardware support on MediaTek MT8173
  based laptops. Most patches actually add features this time, as the
  compile-time diagnostic changes are slowing down"

* tag 'soc-dt-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (1022 commits)
  arm64: dts: rockchip: Add Radxa E54C
  dt-bindings: arm: rockchip: Add Radxa E54C
  arm64: dts: rockchip: remove FRL GPIO for 100ASK DshanPi A1
  arm64: dts: rockchip: fix M.2 E-key reset pinctrl on rk3588 rock-5-itx
  arm64: dts: rockchip: add pcie30phy data-lanes on rk3588 coolpi-cm5-evb
  arm64: dts: rockchip: Add the fan tachometers to Kobol Helios64
  arm64: dts: rockchip: enable NPU on Radxa E52C
  arm64: dts: rockchip: fix adc button voltage on Radxa E52C
  riscv: dts: sophgo: sg2002-milkv-duo256m: drop reserved memory node
  riscv: dts: sophgo: cv1800b-milkv-duo: drop reserved memory node
  arm64: dts: nuvoton: npcm845-evb: Add peripheral nodes
  arm64: dts: nuvoton: npcm845-evb: Fix DTS coding style
  arm64: dts: nuvoton: npcm845: Add peripheral nodes
  arm64: dts: nuvoton: npcm845: Split APB address ranges
  riscv: dts: sophgo: cv180x: Fix internal ephy node name
  riscv: dts: sophgo: add Milk-V Duo 256M ethernet support overlay
  riscv: dts: sophgo: Limit SG2042 SPI NOR to 12.5 MHz
  riscv: dts: sophgo: Enable SPI NOR on SRD3-10
  riscv: dts: spacemit: set ETH MAC from eeprom for OrangePi
  arm64: dts: allwinner: sun50i-h616: Add video engine
  ...

Pull irq chip driver updates from Thomas Gleixner:
 "Updates for interrupt chip drivers:

   - Remove the futile attempts to cleanup resources when the probing of
     the main interrupt chip fails for SiFIVE/PLIC devices. If that
     probe fails the system will stall immediately afterwards in the
     boot process without reaching a state where the error could be
     diagnosed. The lack of resource cleanup led to a frenzy of AI
     detected/assisted "fixes" which just make the code pretend to be
     correct for no value.

     Remove the existing half baked cleanup and immediately panic the
     machine when the probe fails. That's far more useful than letting
     it proceed and stall out a millisecond later with no information
     about the root cause.

   - A series of fixes for the ARM GIC-V3 driver addressing a potential
     double free, a bitmask overrun on 32-bit ARM and a OF node leak.

   - Automatically set the IRQ_DOMAIN_FLAG_DESTROY_GC when a interrupt
     domain is created that also allocates the generic interrupt chip
     during domain creation. That removes the requirement for manually
     setting the flag in the domain creation info structure when it
     contains a valid entry for allocating the generic interrupt chip.
     Remove the therefore redundant setters of
     IRQ_DOMAIN_FLAG_DESTROY_GC in the existing drivers.

   - Add support for Annapurna Labs FIC version 2 and 3 and implement
     affinity control for the demultiplexed interrupts by utilizing the
     recently merged interrupt redirection infrastructure.

   - Convert the ACPI device ID structures to named initializers

   - Consolidate the IPI related constants for RISC-V interrupt
     controllers

   - Add support for Qualcomm Purwa SoC interrupt chip and consolidate
     the workaround for the previous version in Hamoa SoCs.

   - The usual small fixes and improvements all over the place"

* tag 'irq-drivers-2026-10-20' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (61 commits)
  irqchip/al-fic: Support per-child affinity via interrupt redirection
  irqchip/al-fic: Add support for FIC v3
  irqchip/al-fic: Support error and fatal outputs and FIC v2
  dt-bindings: interrupt-controller: amazon,al-fic: Add mask selection
  irqchip/al-fic: Switch to shared parent interrupt
  irqchip/al-fic: Keep the device_node instead of a cached name string
  irqchip/al-fic: Use %pOF and raise init log level
  irqchip/al-fic: Use %pe to print init error
  irqchip/al-fic: Fix coding style issues
  irqchip: Use named initializers for acpi_device_id
  irqchip/gic-v5: Fix standalone IRSes OF probe
  dt-bindings: interrupt-controller: gicv5: Relax IRS properties constraints
  irqchip/renesas-rzv2h: Preserve TIEN state in rzv2h_tint_set_type()
  irqchip/loongson-eiointc: Use pa_to_nid() rather than hard-code
  irqchip/riscv-imsic: Expose the fwnode via the global config
  irqchip/meson-gpio: Allow the GPIO interrupts to wake the system
  irqchip/gic-v3: Ensure change to DS is visible
  irqchip/mips-gic: Transfer interrupt mask state across clusters
  irqchip/mips-gic: Fix recursive acquisition of gic_lock in gic_set_affinity()
  irqchip/mips-gic: Fix unbalanced cm_core_lock in for_each_online_cpu_gic()
  ...

Pull arm64 updates from Catalin Marinas:
 "Here are the arm64 updates for 7.4.

  The more interesting bits are the removal of big-endian kernel support
  (already marked BROKEN for some time), preemptible this_cpu_*()
  operations and MPAM support for the firmware-backed (Fb) interface.

  CCA (Arm's confidential compute) is slowly trickling in with host RMI
  (Realm Management Interface) support and some refactoring, including a
  dedicated SMCCC bus to advertise firmware services. There are also the
  usual PMU updates for new hardware and a few fixes/cleanups.

  Core features:

   - Remove big-endian kernel support: CONFIG_CPU_BIG_ENDIAN has
     depended on BROKEN for a while, so drop the remaining code (BE
     hypervisor object, BPF JIT, assembly/crypto/library routines,
     endianness helper macros, selftests) and force a little-endian
     build

   - Add preemptible this_cpu_*() operations (read/write, RMW, xchg,
     cmpxchg and cmpxchg128) that no longer need to disable preemption
     around the per-CPU address generation and access

   - Preparation patches for implementing CONFIG_HOTPLUG_PARALLEL on
     arm64

  Memory management:

   - Treat faults taken by EFI runtime firmware as kernel faults

   - Clear PTE_WRITE for EFI_MEMORY_RO mappings (with hardware dirty
     state management enabled, this is not truly read-only)

   - Raise the default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA
     configurations (28/26/24 bits for 4K/16K/64K pages)

   - Implement clear_page[s]() using memset()

   - Enable BBML2 no-abort (a.k.a. BBML3) for the NVIDIA Rigel CPU

  Perf and PMU:

   - Support for HiSilicon's ITS PMU

   - Add support for some new events: INST_SIMD_ALU_VEC for Apple PMUs
     and a cycle counter for the latest version of HiSilicon's MN PMU
     hardware

   - A bunch of fixes to the CXL PMU driver to address pre-existing
     issues from Sashiko

   - Fix generation of PERF_RECORD_ITRACE_START records for SPE and ETM
     drivers

   - Reduce excessive stack consumption in the Marvell DDR PMU driver

   - Minor driver updates and cleanups all over

  Arm Confidential Compute Architecture (CCA):

   - Add an Arm SMCCC bus for firmware services discovered through SMCCC
     and move the TRNG and CCA guest (TSM provider) drivers onto it,
     removing the dummy CCA platform device and adding a sysfs ABI for
     Realm guests

   - Move the Realm Service Interface (RSI) code out of arch/arm64/ into
     drivers/firmware/arm_rmm/

   - Add the host side of the Realm Management Interface (RMI): detect,
     configure and activate the RMM, add SRO support and wrappers for
     the Realm RMI commands

   - Block hibernation (new arch hook in the PM core) and kexec while
     the RMM is active. To be revisited in the future with proper
     support for deactivation

   - Handle Granule Protection Faults (GPFs) taken by the host, caused
     by accesses to memory delegated to the RMM. In a future patch, the
     exception table lookup will be limited to is_kdump_kernel() cases

  MPAM (Memory Partitioning And Monitoring):

   - Add support for the MPAM firmware-backed (Fb) interface, allowing
     MSC accesses to be mediated by firmware

   - Fix a list of theoretical issues with the driver (MSC access error
     propagation, MBWU monitor save/restore and locking, resctrl class
     handling, error interrupt restore, maximum number of PARTIDs)

   - Add the mailing list and a missing file to the MAINTAINERS entry

   - Document when to set arm64.nompam

  Errata and CPU features:

   - Add the NXP i.MX8QM/8QP workaround for the Cortex-A53 cache
     coherency issue (ERR050104), using a new ARM64_CPUCAP_SOC_ERRATUM
     capability type for SoC-level errata

  Miscellaneous:

   - Mask debug exceptions (DAIF) around the hardware breakpoint
     register manipulations when called from generic kernel code

   - Don't zero the SVE state buffer when the SVE state is live

   - Return -EPERM instead of -EBUSY from the GCS prctl() locking
     failures (matching x86), with the selftest updated. Slight ABI
     change but no software deployment yet

   - kselftest: fix unsound MTE fault skipping by introducing MTE-safe
     memory accessors, avoid copying each signal test binary more than
     once

   - Update sysreg definitions (fix three enum values and two field
     names, mark architecturally dropped fields as RES0) and remove the
     TME transaction state check from the BRBE driver

   - Fix the description of ARM64_HAS_LPA2 and remove a redundant
     ID_AA64MMFR0 define"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (144 commits)
  arm64: cpufeature: Enable BBML2 for NVIDIA Rigel
  arm64: cputype: Add NVIDIA Rigel definitions
  arm64: raise default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA
  arm64/debug: mask debug exceptions when called from common code
  kselftest/arm64: signal: copy each test binary only once
  kselftest/arm64: Check for -EPERM not -EBUSY in the locking test
  arm64: gcs: Return -EPERM not -EBUSY for prctl() locking failures
  perf: arm_brbe: Remove the check for TME transaction states
  arm64: sysreg: Mark fields the architecture dropped as RES0
  arm64: sysreg: Fix the names of two misspelt fields
  arm64: sysreg: Fix three incorrect enum values
  arm64: smp: Defer RCU registration during secondary CPU bringup
  arm64: smp: Don't bother printing the I-cache policy for each CPU
  arm64: smp: Defer update of secondary CPU capabilities
  arm64: smp: Tidy up cpuinfo init and cpufeature updates
  arm64: smp: Tidy up smp_prepare_cpus()
  arm64: cpufeature: Store every ID register with its overrides applied
  arm64: cpufeature: Read MPAMIDR_EL1 in __cpuinfo_store_cpu()
  arm64: cpufeature: Add read_cpuid_with_overrides()
  arm64: cpufeature: Check arm64_ftr_regs[] before the first store
  ...

RISC-V misc. soc drivers for v7.4

StarFive:
Syscon bindings and a socinfo driver for the JHB100. There ended up
being several clock bindings here also because the clock tree needed the
whole lot due to headers and I envisaged this being part of a three-way
shared tag between my soc driver branch, dts branch and the clock tree.
Due to timing, the dts branch didn't get this content, leading to the
slightly odd branch here.

Microchip:
A bugfix for teardown code in the mpfs system controller driver.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-soc-drivers-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  soc: mpfs: use kref cleanup on probe failure
  soc: starfive: Add socinfo driver for JHB100 SoC
  dt-bindings: soc: starfive: Add StarFive JHB100 syscon modules
  dt-bindings: clock: Add StarFive JHB100 Peripheral-3 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 Peripheral-2 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 Peripheral-1 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 Peripheral-0 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 System-2 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 System-1 clock and reset generator
  dt-bindings: clock: Add StarFive JHB100 System-0 clock and reset generator

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

FSL SOC Changes for 7.4

Freescale QUICC Engine:
- Fix sparse warnings in GPIO
- Drop GPIOD_FLAGS_BIT_NONEXCLUSIVE

Freescale CPM1 Timeslot Assigner:
- Fix clock leak in tsa_of_parse_tdms()

Data Path I/O:
- Free the IRQ before releasing the I/O object
- Fix cleanup on IRQ registration failure

Freescale Management Complex:
- Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
- Drop the fwnode links of the dpmacs nodes
- Register the object drivers after misc_class exists
- Set dma_mask for the DPRC devices
- Fix repeated word 'for' in comment

* tag 'soc_fsl-7.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux:
  soc: fsl: dpio: Free the IRQ before releasing the I/O object
  soc: fsl: dpio: Fix cleanup on IRQ registration failure
  bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
  bus: fsl-mc: drop the fwnode links of the dpmacs nodes
  soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
  soc: fsl: qe: drop GPIOD_FLAGS_BIT_NONEXCLUSIVE
  bus: fsl-mc: register the object drivers after misc_class exists
  bus: fsl-mc: set dma_mask for the DPRC devices
  bus: fsl-mc: fix repeated word 'for' in comment
  soc: fsl: qe: Fix sparse warnings in GPIO

Signed-off-by: Arnd Bergmann <arnd@arndb.de>