linux-toradex.git/drivers/spi, branch tegra Linux kernel for Apalis and Colibri modules spi:tegra: fix number of words in transfer 2015-05-12T07:35:17+00:00 Murat Khairulin kmy@silab.su 2015-05-05T16:43:19+00:00 6067e90bd06d55edbd3b1417369dda53ca11c0f0 Calculate the number of words in a transfer properly: if there are 129-131 bytes, then number of words is more than 32, therefore the transfer should be handled with DMA rather than FIFO. 
Calculate the number of words in a transfer properly: if there are
129-131 bytes, then number of words is more than 32, therefore the
transfer should be handled with DMA rather than FIFO.
spi: tegra: Add stub runtime power management 2012-08-29T20:42:35+00:00 Laxman Dewangan ldewangan@nvidia.com 2012-08-29T11:42:05+00:00 dfc549a6a2638d257ed769d0d2805005294b9c3b Add stub runtime_pm calls which go through the flow of enabling and disabling but don't actually do anything with the device itself as there's nothing useful we can do. This provides the core PM framework with information about when the device is idle, enabling chip wide power savings. Change-Id: Ie795c16840ccbe07e1a8bfac1a1c5a87281e6849 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/128184 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> GVS: Gerrit_Virtual_Submit 
Add stub runtime_pm calls which go through the flow of enabling and
disabling but don't actually do anything with the device itself as
there's nothing useful we can do. This provides the core PM framework
with information about when the device is idle, enabling chip wide
power savings.

Change-Id: Ie795c16840ccbe07e1a8bfac1a1c5a87281e6849
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/128184
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
GVS: Gerrit_Virtual_Submit
spi: tegra: enable warning as error flag 2012-07-31T03:46:48+00:00 Deepak Nibade dnibade@nvidia.com 2012-07-25T05:12:21+00:00 c6f718ec7dea294d4cbad7b20e45da9692410601 -enable warnings as errors compilation flag -handle error of uninitialised variable bug 949219 Change-Id: I9e754b1cbf086f99433d47aef793a8635185a25e Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/118239 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com> Tested-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
-enable warnings as errors compilation flag
-handle error of uninitialised variable

bug 949219

Change-Id: I9e754b1cbf086f99433d47aef793a8635185a25e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/118239
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Tested-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
spi: tegra: create workqueue before register spi master 2012-07-30T15:43:31+00:00 Laxman Dewangan ldewangan@nvidia.com 2012-07-25T08:22:03+00:00 9bde470e06fc9b2899c70a905a9ad0b3d7b1b218 Create all resource require for spi transfer before registering spi master as the spi communication is possible during the registration. bug 1023003 Change-Id: I1f77385866f358effeffb89c6af53a6a2f1c8738 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/118267 
Create all resource require for spi transfer before registering
spi master as the spi communication is possible during the
registration.

bug 1023003

Change-Id: I1f77385866f358effeffb89c6af53a6a2f1c8738
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/118267
spi: tegra: macro for enable/disable runtime pm inside driver 2012-07-02T13:20:35+00:00 Laxman Dewangan ldewangan@nvidia.com 2012-06-29T11:50:59+00:00 ad8fabee431584601e7184da76604ad3dfdd1109 Add macro in the spi tegra driver for enabling/disabling runtime PM specific to this driver. Setting macro SPI_PM_RUNTIME_ENABLE to 1 will enable the runtime pm and resetting to 0 make runtime pm disable. The dynamic clock management i.e. enabling the clock before transfer and disabling after transfer complete is done in both the cases. When runtime pm is enabled then clock control is done through runtime pm callbacks otherwise it will be directly call the clock control apis. bug 1003103 Change-Id: I2544e8f3b3e5605e0247791653a5a0ed6c36e9b6 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/112142 Reviewed-by: Automatic_Commit_Validation_User 
Add macro in the spi tegra driver for enabling/disabling
runtime PM specific to this driver.
Setting macro SPI_PM_RUNTIME_ENABLE to 1 will enable the
runtime pm and resetting to 0 make runtime pm disable.

The dynamic clock management i.e. enabling the clock before
transfer and disabling after transfer complete is done in
both the cases.
When runtime pm is enabled then clock control is done through
runtime pm callbacks otherwise it will be directly call the
clock control apis.

bug 1003103

Change-Id: I2544e8f3b3e5605e0247791653a5a0ed6c36e9b6
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/112142
Reviewed-by: Automatic_Commit_Validation_User
spi: tegra: check tx queue before start transfer 2012-06-20T21:04:06+00:00 Ashwini Ghuge aghuge@nvidia.com 2012-06-20T08:34:49+00:00 a85a9db8f4a108c0d07680127e5fbf272095f0ac Check for valid entry on the message queue before reading the transfer list from queue. If queue is empty then do not start transfer. Change-Id: If51a816780ab76700a7a1d7d8a025a3544590ad1 Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com> Reviewed-on: http://git-master/r/109469 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com> 
Check for valid entry on the message queue before
reading the transfer list from queue. If queue is
empty then do not start transfer.

Change-Id: If51a816780ab76700a7a1d7d8a025a3544590ad1
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/109469
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
spi: tegra: dump registers when error occurs 2012-06-20T20:56:20+00:00 Ashwini Ghuge aghuge@nvidia.com 2012-06-20T08:22:45+00:00 ce93880e4c6cabc9978a3f888002ca08cb00aad1 When any error occurs in spi communication, dump the spi registers for debug purpose Change-Id: I5cf226d4b504c95a6abb8dcf5b8c0ba1ef44271c Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com> Reviewed-on: http://git-master/r/109466 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com> 
When any error occurs in spi communication,
dump the spi registers for debug purpose

Change-Id: I5cf226d4b504c95a6abb8dcf5b8c0ba1ef44271c
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/109466
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
spi: tegra: Max tx words limited to max buff size 2012-06-20T20:47:44+00:00 Ashwini Ghuge aghuge@nvidia.com 2012-06-20T08:44:28+00:00 4c165a4d5e76e5c111ac21c9d9506ea6d87705c9 When computing required words for a transfer, limit this to max possible size on given sub transfer Change-Id: Ia1a9290ae389e36ecb5a8d03be2982885a544a33 Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com> Reviewed-on: http://git-master/r/109462 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com> 
When computing required words for a transfer,
limit this to max possible size on given
sub transfer

Change-Id: Ia1a9290ae389e36ecb5a8d03be2982885a544a33
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/109462
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
spi: tegra: do not start transfer if runtime pm fails to resume 2012-06-20T20:40:53+00:00 Johnny Qiu joqiu@nvidia.com 2012-06-18T07:11:23+00:00 b426ea53fbdd902e85eacb865d1b2912b49260fe Bug 995706 During device shutdown/rebooting, runtime PM is disabled. SPI bus driver will fail to call tegra_spi_runtime_resume() to resume the clock needed by tranferring. In this case, do not start transferring. Change-Id: I42cc0763f55b6c90df00fbad68794939e903199a Signed-off-by: Johnny Qiu <joqiu@nvidia.com> Reviewed-on: http://git-master/r/109458 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> 
Bug 995706

During device shutdown/rebooting, runtime PM is disabled. SPI bus
driver will fail to call tegra_spi_runtime_resume() to resume the
clock needed by tranferring. In this case, do not start transferring.

Change-Id: I42cc0763f55b6c90df00fbad68794939e903199a
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/109458
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
spi: tegra: use functions to avoid duplicated code 2012-05-25T21:49:13+00:00 Laxman Dewangan ldewangan@nvidia.com 2012-05-24T12:56:54+00:00 0a9c2618396cdb1fb88a70bae9492c7c7e60c34a The dma allocation method for receive and transmit is same and so instead of duplicating the same code for rx and tx, making the function to have common code and using the function for dma allocation. This reduces duplicated code. Change-Id: Ibe15eec896bc581bda8c68572eb1425c3bf6a7b2 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/104465 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> 
The dma allocation method for receive and transmit is
same and so instead of duplicating the same code for
rx and tx, making the function to have common code and
using the function for dma allocation.
This reduces duplicated code.

Change-Id: Ibe15eec896bc581bda8c68572eb1425c3bf6a7b2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/104465
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>