linux-toradex.git/drivers/spi, branch tegra-T30.ER5 Linux kernel for Apalis and Colibri modules arm: tegra: dma: Adding client name with dma allocation. 2011-04-26T22:56:18+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-04-18T11:05:41+00:00 89aa98edfb250b54549580a6b0261a23af3d7c0c By changing the dma allocation API to take the client name, it is easy to track who is allocated the DMA channels when we run out of the DMA channels. Original-Change-Id: I016011cfd74089fed0da1bc0f121800017ce124a Reviewed-on: http://git-master/r/28031 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Change-Id: I048bcb87f95ee6d8ad2fdce993a1758dc5071666 
By changing the dma allocation API to take the client name, it is easy
to track who is allocated the DMA channels when we run out of the
DMA channels.

Original-Change-Id: I016011cfd74089fed0da1bc0f121800017ce124a
Reviewed-on: http://git-master/r/28031
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Change-Id: I048bcb87f95ee6d8ad2fdce993a1758dc5071666
spi: tegra: Spi controller configured during device setup 2011-04-26T22:55:48+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-04-13T08:34:12+00:00 b4b9ec736286c23b699f94eac52094bb1b92774c When spi device calls the setup, the interface to that device should be configured immediately. For this, it is required to configure controller in setup call. Original-Change-Id: I77795c476729fe7403529a45cdf99d5732ad0784 Reviewed-on: http://git-master/r/27607 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Change-Id: I9a3f200dbea7d8cc057bb5413e790c28578e77cf 
When spi device calls the setup, the interface to that device
should be configured immediately. For this, it is required
to configure controller in setup call.

Original-Change-Id: I77795c476729fe7403529a45cdf99d5732ad0784
Reviewed-on: http://git-master/r/27607
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Change-Id: I9a3f200dbea7d8cc057bb5413e790c28578e77cf
spi: tegra: Adding spi slave support 2011-04-26T22:55:42+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-04-13T08:31:52+00:00 eda2cec4a4ef468cf2147d818968255805e52d8f Adding spi slave driver for tegra socs. The interface is same as the master spi but spi controller will work in slave mode. Original-Change-Id: Ibf00e9d16e7bac675dd431a35e866bf56030f033 Reviewed-on: http://git-master/r/27605 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Change-Id: I1d770ae52371bae5869b03c69f86c06fb9cdc9fa 
Adding spi slave driver for tegra socs.
The interface is same as the master spi but spi controller
will work in slave mode.

Original-Change-Id: Ibf00e9d16e7bac675dd431a35e866bf56030f033
Reviewed-on: http://git-master/r/27605
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
Change-Id: I1d770ae52371bae5869b03c69f86c06fb9cdc9fa
ARM: tegra: Use proper type for physical addresses 2011-04-26T22:55:42+00:00 Scott Williams scwilliams@nvidia.com 2011-04-13T00:47:52+00:00 790b41bd41628f1d303c1114b79e8078c7a31101 Original-Change-Id: I158d2be97c795313e7e74ce9fb4ec0bdc7d95496 Reviewed-on: http://git-master/r/27559 Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Change-Id: I0ff198daa548ed2837f7fb1794013bf0adf7e5a1 
Original-Change-Id: I158d2be97c795313e7e74ce9fb4ec0bdc7d95496
Reviewed-on: http://git-master/r/27559
Tested-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Hiro Sugawara <hsugawara@nvidia.com>
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: I0ff198daa548ed2837f7fb1794013bf0adf7e5a1
spi: tegra: Supporting HW based CS control 2011-04-26T22:54:22+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-03-23T11:18:09+00:00 4571f236212393b16a0c55a813b62e6903bcc0da Supporting the hw based CS to communicate to spi device. This provides the constraints in hold and setup time of CS before clock start and clock ends. The hw based CS can be selected if spi client provide the option through the device controler data and only one transfer per message is requested. Original-Change-Id: I56d5e466361cb8b3710646e01494ddac46791ae4 Reviewed-on: http://git-master/r/23988 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Amit Kamath <akamath@nvidia.com> Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Change-Id: I52b1dcdefa199cd11ae7f838c61411a6268a2d32 
Supporting the hw based CS to communicate to spi device. This
provides the constraints in hold and setup time of CS before
clock start and clock ends.

The hw based CS can be selected if spi client provide the option
through the device controler data and only one transfer per
message is requested.

Original-Change-Id: I56d5e466361cb8b3710646e01494ddac46791ae4
Reviewed-on: http://git-master/r/23988
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Amit Kamath <akamath@nvidia.com>
Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
Change-Id: I52b1dcdefa199cd11ae7f838c61411a6268a2d32
spi: tegra: Fixing misc issues. 2011-03-09T04:56:25+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-02-23T14:32:45+00:00 65e096e245f843ddc1bd11e42682fd4cf2135c2e Following are the fixes; - Supportng half duplex. - Only using SW based CS. - Write to readback with command register does not work. Fixing issue. - Using cpu based transfer for smaller size and dma based for larger size. - reading proper transfer status after every transaction. bug 791149 bug 791780 Change-Id: I293b3f1b571276f5d8fe4ad4da67f827926e4b73 Reviewed-on: http://git-master/r/20581 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Amit Kamath <akamath@nvidia.com> 
Following are the fixes;
- Supportng half duplex.
- Only using SW based CS.
- Write to readback with command register does not work. Fixing issue.
- Using cpu based transfer for smaller size and dma based for larger size.
- reading proper transfer status after every transaction.

bug 791149
bug 791780

Change-Id: I293b3f1b571276f5d8fe4ad4da67f827926e4b73
Reviewed-on: http://git-master/r/20581
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Amit Kamath <akamath@nvidia.com>
spi: tegra: disabling packed mode 2011-01-25T23:36:03+00:00 Amit Kamath akamath@nvidia.com 2011-01-18T13:19:58+00:00 e759fbdb9d3cc35e0d74a18b499a8aac4af303cd disable unstable packed spi mode Change-Id: I81a11a0f5dd9515ff1430ccfcc7d2ed7371e79b3 Reviewed-on: http://git-master/r/16105 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
disable unstable packed spi mode

Change-Id: I81a11a0f5dd9515ff1430ccfcc7d2ed7371e79b3
Reviewed-on: http://git-master/r/16105
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
[ARM] tegra: spi: Fixed setup bugs 2011-01-18T13:07:56+00:00 Amit Kamath akamath@nvidia.com 2010-12-29T10:48:31+00:00 fa24cce6997064aeb7610762aa75815d88f3e279 Enabled clocks at spi_setup Fixed problem with endianness for 16 bit word size Fixed issue with small packet size less than fifo depth Fixed typo that enabled RX and TX by default Integration from http://git-master/r/#change,14536 Change-Id: I2cea3bdcb6a19780087671131a848095354105a3 Reviewed-on: http://git-master/r/15949 Reviewed-on: http://git-master/r/16048 Reviewed-by: Amit Kamath <akamath@nvidia.com> Tested-by: Amit Kamath <akamath@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
Enabled clocks at spi_setup
Fixed problem with endianness for 16 bit word size
Fixed issue with small packet size less than fifo depth
Fixed typo that enabled RX and TX by default

Integration from http://git-master/r/#change,14536

Change-Id: I2cea3bdcb6a19780087671131a848095354105a3
Reviewed-on: http://git-master/r/15949
Reviewed-on: http://git-master/r/16048
Reviewed-by: Amit Kamath <akamath@nvidia.com>
Tested-by: Amit Kamath <akamath@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
[misc] remove executable permission on spi_tegra.c 2010-12-22T05:17:03+00:00 minwuklee mlee@nvidia.com 2010-12-22T01:36:57+00:00 6844e57c1b29111f189550b7746f7dc19da228b7 remove executable permission on the target file. Change-Id: I85c88e111cfe54d068d0dd47354f08b2e78537ef Reviewed-on: http://git-master/r/14040 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> 
remove executable permission on the target file.

Change-Id: I85c88e111cfe54d068d0dd47354f08b2e78537ef
Reviewed-on: http://git-master/r/14040
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
[tegra:spi] master tegra spi driver update 2010-12-21T10:50:29+00:00 minwuklee mlee@nvidia.com 2010-12-21T10:20:21+00:00 ba2891ed491f531517e717274e1144bf442e13b9 - DMA burst size can be set to 1, 4, or 8 depending on requested size - PACKED MODE support - When bits per word is 32, no endian conversion is needed; so use memcpy to copy from client buf to dma buf or vice versa - Do spi_complete operation in the last dma complete callback - Reducing the loop-count from 500 to 50, thus making sure suspend is not stuck. bug 747979 bug 765062 Change-Id: I67fe1405e1cda886e9229b26dff5ebd80fd67247 Reviewed-on: http://git-master/r/12799 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> 
- DMA burst size can be set to 1, 4, or 8 depending on requested size
- PACKED MODE support
- When bits per word is 32, no endian conversion is needed; so use
memcpy to copy from client buf to dma buf or vice versa
- Do spi_complete operation in the last dma complete callback
- Reducing the loop-count from 500 to 50, thus making sure suspend is
not stuck.

bug 747979
bug 765062

Change-Id: I67fe1405e1cda886e9229b26dff5ebd80fd67247
Reviewed-on: http://git-master/r/12799
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>