Merge series from Anurag Dutta <a-dutta@ti.com>:

This series addresses issues in the cadence-quadspi driver's probe
error path:

Patch 1 fixes a clock disable imbalance that occurs when probe fails
after runtime PM is enabled, particularly when DMA request returns
-EPROBE_DEFER.

Patch 2 adds proper error logging for DMA request failures using
dev_err_probe() to improve diagnostics and handle probe deferral
appropriately.

logs : https://gist.github.com/anuragdutta731/59925cd11a50913b7128c88cd5394db7

This driver is migrated to use threaded IRQ since commit 5972eb05ca32
("spi: spi-mt65xx: Use threaded interrupt for non-SPIMEM transfer"), and
we almost always want to disable the interrupt line to avoid excess
interrupts while the threaded handler is processing SPI transfer.
Use IRQF_ONESHOT for that purpose.

In practice, we see MediaTek devices show SPI transfer timeout errors
when communicating with ChromeOS EC in certain scenarios, and with
IRQF_ONESHOT, the issue goes away.

Signed-off-by: Fei Shao <fshao@chromium.org>
Link: https://patch.msgid.link/20251217101131.1975131-1-fshao@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>

When cqspi_request_mmap_dma() returns -EPROBE_DEFER after runtime PM
is enabled, the error path calls clk_disable_unprepare() on an already
disabled clock, causing an imbalance.

Use pm_runtime_get_sync() to increment the usage counter and resume the
device. This prevents runtime_suspend() from being invoked and causing
a double clock disable.

Fixes: 140623410536 ("mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller")
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Link: https://patch.msgid.link/20251212072312.2711806-3-a-dutta@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>

Add dev_err_probe() to log DMA request failures. This properly handles
-EPROBE_DEFER at debug level, reducing log spam during deferred probing.

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Link: https://patch.msgid.link/20251212072312.2711806-2-a-dutta@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>

Commit fc96ec826bce ("spi: fsl-cpm: Use 16 bit mode for large transfers
with even size") failed to make sure that the size is really even
before switching to 16 bit mode. Until recently the problem went
unnoticed because kernfs uses a pre-allocated bounce buffer of size
PAGE_SIZE for reading EEPROM.

But commit 8ad6249c51d0 ("eeprom: at25: convert to spi-mem API")
introduced an additional dynamically allocated bounce buffer whose size
is exactly the size of the transfer, leading to a buffer overrun in
the fsl-cpm driver when that size is odd.

Add the missing length parity verification and remain in 8 bit mode
when the length is not even.

Fixes: fc96ec826bce ("spi: fsl-cpm: Use 16 bit mode for large transfers with even size")
Cc: stable@vger.kernel.org
Closes: https://lore.kernel.org/all/638496dd-ec60-4e53-bad7-eb657f67d580@csgroup.eu/
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: Sverdlin Alexander <alexander.sverdlin@siemens.com>
Link: https://patch.msgid.link/3c4d81c3923c93f95ec56702a454744a4bad3cfc.1763627618.git.christophe.leroy@csgroup.eu
Signed-off-by: Mark Brown <broonie@kernel.org>

mpfs_spi_init() calls mpfs_spi_enable_ints(), so mpfs_spi_disable_ints()
should be called if an error occurs after calling mpfs_spi_init(), as
already done in the remove function.

Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://patch.msgid.link/eb35f168517cc402ef7e78f26da02863e2f45c03.1765612110.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown <broonie@kernel.org>

Pull spi fixes from Mark Brown:
 "A few small fixes for SPI that came in during the merge window,
  nothing too exciting here"

* tag 'spi-fix-v6.19-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: microchip-core: Fix an error handling path in mchp_corespi_probe()
  spi: cadence-qspi: Fix runtime PM imbalance in probe

mchp_corespi_init() calls mchp_corespi_enable_ints(), so
mchp_corespi_disable_ints() should be called if an error occurs after
calling mchp_corespi_init(), as already done in the remove function.

Fixes: 059f545832be ("spi: add support for microchip "soft" spi controller")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://patch.msgid.link/a7aaff1f28a83303a288de2914724a874fe1a11e.1764969247.git.christophe.jaillet@wanadoo.fr
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

Pull gpio updates from Bartosz Golaszewski:
 "There's one new driver, lots of various updates to existing ones, some
  refactoring support for new models and misc tweaks and fixes.

  The biggest new feature in GPIO core is adding support for managed,
  enable-counted sharing of GPIO pins, something that - until now - was
  only hacked around with the GPIOD_FLAGS_BIT_NONEXCLUSIVE request flag
  which basically allowed drivers to "fight it out" for the descriptor
  and provided no synchronization. It was enabled on Qualcomm platforms
  (and thus is enabled on arm64 defconfig) and I plan on removing
  GPIOD_FLAGS_BIT_NONEXCLUSIVE once all drivers using it are switched to
  the new mechanism.

  GPIO core:
   - add proper support for shared GPIOs that's aiming to replace the
     current sharing mechanism (which provides no synchronization ot
     enable counting) and enable it for Qualcomm platforms
   - improve the software node GPIO lookup by using the fwnode
     representation instead of the software node's name which was prone
     to bugs (GPIO controllers don't have to use the software node's
     name as their kernel label)
   - remove the last user of legacy-of-mm-gpiochip.h and drop the header
   - move closer to removing the legacy gpio_request_one() routine
   - rename some symbols for consistency
   - shrink GPIO printk() helpers by reusing existing code
   - remove some redundant kernel messages
   - use min() instead of min_t() in GPIO ACPI code
   - use system_percpu_wq instead of system_wq in GPIO character device
     code

  New drivers:
   - add a driver for the QIXIS FPGA GPIO controller

  Driver improvements:
   - use modernized variants of power management macros across a wide
     array of drivers in order to avoid having to use the __maybe_unused
     attribute
   - convert gpio-elkhartlake and reset-gpio to using the auxiliary bus
     instead of the platform bus as they are not really described in
     firmware
   - use lock guards and update symbol prefixes in gpio-mmio
   - support the bryx radio interface kit in gpio-mpsse + refactor the
     driver
   - use software nodes for configuring the reset-gpio driver, including
     setting up the reference to the shared "reset" pin
   - check and propagate the return value of gpiod_set_value() to
     user-space in gpio-virtuser (this was previously not possible as
     this function returned void)
   - extend the gpio-regmap helper with more features (bypass cache for
     aliased inputs, force writes for aliased data registers, add a new
     configuration parameter)
   - remove unneeded includes from gpio-aspeed and gpio-latch
   - add support for Tegra410 to gpio-tegra186
   - replace PCI-specific PM with generic device-level PM in gpio-bt8xx
   - use dynamic GPIO range allocation in gpio-loongson-64bit
   - improve handling of level-triggered interrupts in gpio-pca953x
   - add suspend/resume support to gpio-fxl6408
   - add support for more models to gpio-menz127
   - optimize gpio-mvebu interrupt handling by avoiding unnecessary
     calls to mvebu_gpio_irq_handler()
   - make locking more consistent in gpio-grgpio

  Device-tree bindings:
   - document new NXP and Microchip models

  Documentation:
   - add a comprehensive compatibility and feature list for
     gpio-pca953x, which is a great addition as it's probably the most
     commonly used GPIO expander driver
   - kernel-doc tweaks

  Late fixes:
   - use BYTE_CTRL_MODE for 2K2000/3000 models in gpio-loongson"

* tag 'gpio-updates-for-v6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (80 commits)
  gpio: loongson: Switch 2K2000/3000 GPIO to BYTE_CTRL_MODE
  gpio: regmap: fix kernel-doc notation
  gpio: shared: fix a deadlock
  gpio: shared-proxy: set suppress_bind_attrs
  gpio: shared: ignore GPIO hogs when traversing the device tree
  gpio: shared: ignore special __symbols__ node when traversing device tree
  gpio: shared: handle the reset-gpios corner case
  gpio: zynq: Use modern PM macros
  gpio: xilinx: Use modern PM macros
  gpio: xgene: Use modern PM macros
  gpio: uniphier: Use modern PM macros
  gpio: tqmx86: Use modern PM macros
  gpio: pch: Use modern PM macros
  gpio: omap: Use modern PM macros
  gpio: msc313: Use modern PM macros
  gpio: mlxbf2: Use modern PM macros
  gpio: ml-ioh: Use modern PM macros
  gpio: pl061: Use modern PM macros
  gpio: htc-egpio: Use modern PM macros
  gpio: brcmstb: Use modern PM macros
  ...

Pull spi updates from Mark Brown:
 "This release is almost entirely new drivers, with a couple of small
  changes in generic code.

  The biggest individual update is a rename of the existing Microchip
  driver and the addition of a new driver for the silicon SPI controller
  in their PolarFire SoCs. The overlap between the soft IP supported by
  the current driver and this new one is regrettably all in the IP and
  not in the register interface offered to software.

   - Add a time offset parameter for offloads, allowing them to be
     defined in relation to each other. This is useful for IIO type
     applcations where you trigger an operation then read the result
     after a delay.

   - Add a tracepoint for flash exec_ops, bringing the flash support
     more in line with the debuggability of vanilla SPI.

   - Support for Airoha EN7523, Arduino MCUs, Aspeed AST2700, Microchip
     PolarFire SPI controllers, NXP i.MX51 ECSPI target mode, Qualcomm
     IPQ5414 and IPQ5332, Renesas RZ/T2H, RZ/V2N and RZ/2NH and SpacemiT
     K1 QuadSPI.

  There's also a small set of ASoC cleanups that I mistakenly applied to
  the SPI tree and then put more stuff on top of before it was brought
  to my attention, sorry about that"

* tag 'spi-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (80 commits)
  spi: microchip-core: Refactor FIFO read and write handlers
  spi: ch341: fix out-of-bounds memory access in ch341_transfer_one
  spi: microchip-core: Remove unneeded PM related macro
  spi: microchip-core: Use SPI_MODE_X_MASK
  spi: microchip-core: Utilise temporary variable for struct device
  spi: microchip-core: Replace dead code (-ENOMEM error message)
  spi: microchip-core: use min() instead of min_t()
  spi: dt-bindings: airoha: add compatible for EN7523
  spi: airoha-snfi: en7523: workaround flash damaging if UART_TXD was short to GND
  spi: dt-bindings: renesas,rzv2h-rspi: Document RZ/V2N SoC support
  spi: dt-bindings: renesas,rzv2h-rspi: Document RZ/V2N SoC support
  spi: microchip: Enable compile-testing for FPGA SPI controllers
  spi: Fix potential uninitialized variable in probe()
  spi: rzv2h-rspi: add support for RZ/T2H and RZ/N2H
  spi: dt-bindings: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2H
  spi: rzv2h-rspi: add support for loopback mode
  spi: rzv2h-rspi: add support for variable transfer clock
  spi: rzv2h-rspi: add support for using PCLK for transfer clock
  spi: rzv2h-rspi: make transfer clock rate finding chip-specific
  spi: rzv2h-rspi: avoid recomputing transfer frequency
  ...