linux-toradex.git/drivers/thunderbolt, branch v6.7

thunderbolt: Fix minimum allocated USB 3.x and PCIe bandwidth

2023-12-08T07:03:49+00:00

With the current bandwidth allocation we end up reserving too much for the USB
3.x and PCIe tunnels that leads to reduced capabilities for the second
DisplayPort tunnel.

Fix this by decreasing the USB 3.x allocation to 900 Mb/s which then allows
both tunnels to get the maximum HBR2 bandwidth.  This way, the reserved
bandwidth for USB 3.x and PCIe, would be 1350 Mb/s (taking weights of USB 3.x
and PCIe into account). So bandwidth allocations on a link are:
USB 3.x + PCIe tunnels => 1350 Mb/s
DisplayPort tunnel #1  => 17280 Mb/s
DisplayPort tunnel #2  => 17280 Mb/s

Total consumed bandwidth is 35910 Mb/s. So that all the above can be tunneled
on a Gen 3 link (which allows maximum of 36000 Mb/s).

Fixes: 582e70b0d3a4 ("thunderbolt: Change bandwidth reservations to comply USB4 v2")
Signed-off-by: Gil Fine 
Signed-off-by: Mika Westerberg

thunderbolt: Fix memory leak in margining_port_remove()

2023-11-27T10:45:47+00:00

The dentry returned by debugfs_lookup() needs to be released by calling
dput() which is missing in margining_port_remove(). Fix this by calling
debugfs_lookup_and_remove() that combines both and avoids the memory leak.

Fixes: d0f1e0c2a699 ("thunderbolt: Add support for receiver lane margining")
Cc: stable@vger.kernel.org
Signed-off-by: Yaxiong Tian 
Signed-off-by: Mika Westerberg

thunderbolt: Only add device router DP IN to the head of the DP resource list

2023-11-17T11:05:57+00:00

When pairing DP IN and DP OUT adapters for DisplayPort tunneling, we
should prioritize the possible external GPU DP IN adapters to take
advantage of the its capabilities. However the commit in question did
this for host router DP IN adapters too and that changes ordering of the
initial DP IN resources in such way that resuming from suspend may end
up using different resource and that may confuse the user.

Fix this so that we only put DP IN adapters of device routers to the top
of the resource list and leave host routers as is.

Fixes: 274baf695b08 ("thunderbolt: Add DP IN added last in the head of the list of DP resources")
Reported-by: Pengfei Xu 
Signed-off-by: Mika Westerberg

thunderbolt: Send uevent after asymmetric/symmetric switch

2023-11-17T11:05:57+00:00

We should send uevent to userspace whenever the link speed or width
changes but tb_switch_asym_enable() and tb_switch_asym_disable() set the
sw->link_width already so tb_switch_update_link_attributes() never
noticed the change.

Fix this so that we let tb_switch_update_link_attributes() update the
fields accordingly.

Fixes: 81af2952e606 ("thunderbolt: Add support for asymmetric link")
Reported-by: Pengfei Xu 
Tested-by: Pengfei Xu 
Signed-off-by: Mika Westerberg

thunderbolt: Set lane bonding bit only for downstream port

2023-11-17T11:05:57+00:00

Fix the lane bonding procedure to follow the steps described in USB4
Connection Manager guide. Hence, set the lane bonding bit only for
downstream port. This is needed for certain ASMedia device, otherwise
lane bonding fails and the device disconnects.

Cc: stable@vger.kernel.org
Signed-off-by: Gil Fine 
Signed-off-by: Mika Westerberg

Merge tag 'usb-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

2023-11-04T02:00:42+00:00

Pull USB/Thunderbolt updates from Greg KH:
 "Here is the "big" set of USB and Thunderbolt changes for 6.7-rc1.
  Nothing really major in here, just lots of constant development for
  new hardware. Included in here are:

   - Thunderbolt (i.e. USB4) fixes for reported issues and support for
     new hardware types and devices

   - USB typec additions of new drivers and cleanups for some existing
     ones

   - xhci cleanups and expanded tracing support and some platform
     specific updates

   - USB "La Jolla Cove Adapter (LJCA)" support added, and the gpio,
     spi, and i2c drivers for that type of device (all acked by the
     respective subsystem maintainers.)

   - lots of USB gadget driver updates and cleanups

   - new USB dwc3 platforms supported, as well as other dwc3 fixes and
     cleanups

   - USB chipidea driver updates

   - other smaller driver cleanups and additions, full details in the
     shortlog

  All of these have been in the linux-next tree for a while with no
  reported problems"

* tag 'usb-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (167 commits)
  usb: gadget: uvc: Add missing initialization of ssp config descriptor
  usb: storage: set 1.50 as the lower bcdDevice for older "Super Top" compatibility
  usb: raw-gadget: report suspend, resume, reset, and disconnect events
  usb: raw-gadget: don't disable device if usb_ep_queue fails
  usb: raw-gadget: properly handle interrupted requests
  usb:cdnsp: remove TRB_FLUSH_ENDPOINT command
  usb: gadget: aspeed_udc: Convert to platform remove callback returning void
  dt-bindings: usb: fsa4480: Add compatible for OCP96011
  usb: typec: fsa4480: Add support to swap SBU orientation
  dt-bindings: usb: fsa4480: Add data-lanes property to endpoint
  usb: typec: tcpm: Fix NULL pointer dereference in tcpm_pd_svdm()
  Revert "dt-bindings: usb: Add bindings for multiport properties on DWC3 controller"
  Revert "dt-bindings: usb: qcom,dwc3: Add bindings for SC8280 Multiport"
  thunderbolt: Fix one kernel-doc comment
  usb: gadget: f_ncm: Always set current gadget in ncm_bind()
  usb: core: Remove duplicated check in usb_hub_create_port_device
  usb: typec: tcpm: Add additional checks for contaminant
  arm64: dts: rockchip: rk3588s: Add USB3 host controller
  usb: dwc3: add optional PHY interface clocks
  dt-bindings: usb: add rk3588 compatible to rockchip,dwc3
  ...

Merge tag 'thunderbolt-for-v6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into usb-next

2023-10-27T09:41:07+00:00

Mika writes:

thunderbolt: Changes for v6.7 merge window

This includes following USB4/Thunderbolt changes for the v6.7 merge
window:

  - Configure asymmetric link if the DisplayPort bandwidth requires so
  - Enable path power management packet support for USB4 v2 routers
  - Make the bandwidth reservations to follow the USB4 v2 connection
    manager guide suggestions
  - DisplayPort tunneling improvements
  - Small cleanups and improvements around the driver.

All these have been in linux-next with no reported issues.

* tag 'thunderbolt-for-v6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt: (25 commits)
  thunderbolt: Fix one kernel-doc comment
  thunderbolt: Configure asymmetric link if needed and bandwidth allows
  thunderbolt: Add support for asymmetric link
  thunderbolt: Introduce tb_switch_depth()
  thunderbolt: Introduce tb_for_each_upstream_port_on_path()
  thunderbolt: Introduce tb_port_path_direction_downstream()
  thunderbolt: Set path power management packet support bit for USB4 v2 routers
  thunderbolt: Change bandwidth reservations to comply USB4 v2
  thunderbolt: Make is_gen4_link() available to the rest of the driver
  thunderbolt: Use weight constants in tb_usb3_consumed_bandwidth()
  thunderbolt: Use constants for path weight and priority
  thunderbolt: Add DP IN added last in the head of the list of DP resources
  thunderbolt: Create multiple DisplayPort tunnels if there are more DP IN/OUT pairs
  thunderbolt: Log NVM version of routers and retimers
  thunderbolt: Use tb_tunnel_xxx() log macros in tb.c
  thunderbolt: Expose tb_tunnel_xxx() log macros to the rest of the driver
  thunderbolt: Use tb_tunnel_dbg() where possible to make logging more consistent
  thunderbolt: Fix typo of HPD bit for Hot Plug Detect
  thunderbolt: Fix typo in enum tb_link_width kernel-doc
  thunderbolt: Fix debug log when DisplayPort adapter not available for pairing
  ...

thunderbolt: Fix one kernel-doc comment

2023-10-24T04:49:17+00:00

Fix a spelling errors in kernel doc comment, silence the warning:

drivers/thunderbolt/tb.c:760: warning: expecting prototype for tb_maximum_banwidth(). Prototype was for tb_maximum_bandwidth() instead

Reported-by: Abaci Robot 
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=7048
Signed-off-by: Yang Li 
Signed-off-by: Mika Westerberg

thunderbolt: Configure asymmetric link if needed and bandwidth allows

2023-10-20T15:18:01+00:00

USB4 v2 spec defines a Gen 4 link that can operate as an asymmetric
120/40G. When the link is asymmetric, the USB4 port on one side of the
link operates with three TX lanes and one RX lane, while the USB4 port
on the opposite side of the link operates with three RX lanes and one TX
lane. Using asymmetric link we can get much more bandwidth from one
direction and that allows us to support the new Ultra High Bit Rate
DisplayPort modes (that consume up to 77.37 Gb/s).

Add the basic logic for changing Gen 4 links to asymmetric and back
following the below rules:

  1) The default threshold is 45 Gb/s (tunable by asym_threshold)
  2) When DisplayPort tunnel is established, or when there is bandwidth
     request through bandwidth allocation mode, the links can be
     transitioned to asymmetric or symmetric (depending on the
     required bandwidth).
  3) Only DisplayPort bandwidth on a link, is taken into account when
     deciding whether a link is transitioned to asymmetric or symmetric
  4) If bandwidth on a link is >= asym_threshold transition the link to
     asymmetric
  5) If bandwidth on a link < asym_threshold transition the link to
     symmetric (unless the bandwidth request is above currently
     allocated on a tunnel).
  6) If a USB4 v2 device router with symmetric link is connected,
     transition all the links above it to symmetric if the bandwidth
     allows.

Signed-off-by: Gil Fine 
Co-developed-by: Mika Westerberg 
Signed-off-by: Mika Westerberg

thunderbolt: Add support for asymmetric link

2023-10-20T15:18:01+00:00

USB4 v2 spec defines a Gen 4 link that can operate as an aggregated
symmetric (80/80G) or asymmetric (120/40G). When the link is asymmetric,
the USB4 port on one side of the link operates with three TX lanes and
one RX lane, while the USB4 port on the opposite side of the link
operates with three RX lanes and one TX lane.

Add support for the asymmetric link and provide functions that can be
used to transition the link to asymmetric and back.

Signed-off-by: Gil Fine 
Co-developed-by: Mika Westerberg 
Signed-off-by: Mika Westerberg