linux-toradex.git/drivers/tty/serial/amba-pl011.c, branch v3.2.50

serial: pl011: handle corruption at high clock speeds

2012-10-17T02:49:02+00:00

commit c5dd553b9fd069892c9e2de734f4f604e280fa7a upstream.

This works around a few glitches in the ST version of the PL011
serial driver when using very high baud rates, as we do in the
Ux500: 3, 3.25, 4 and 4.05 Mbps.

Problem Observed/rootcause:

When using high baud-rates, and the baudrate*8 is getting close to
the provided clock frequency (so a division factor close to 1), when
using bursts of characters (so they are abutted), then it seems as if
there is not enough time to detect the beginning of the start-bit which
is a timing reference for the entire character, and thus the sampling
moment of character bits is moving towards the end of each bit, instead
of the middle.

Fix:
Increase slightly the RX baud rate of the UART above the theoretical
baudrate by 5%. This will definitely give more margin time to the
UART_RX to correctly sample the data at the middle of the bit period.

Also fix the ages old copy-paste error in the very stressed comment,
it's referencing the registers used in the PL010 driver rather than
the PL011 ones.

Signed-off-by: Guillaume Jaunet 
Signed-off-by: Christophe Arnal 
Signed-off-by: Matthias Locher 
Signed-off-by: Rajanikanth HV 
Cc: Bibek Basu 
Cc: Par-Gunnar Hjalmdahl 
Signed-off-by: Linus Walleij 
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Ben Hutchings

serial: PL011: move interrupt clearing

2012-04-22T22:31:11+00:00

commit c3d8b76f61586714cdc5f219ba45592a54caaa55 upstream.

Commit 360f748b204275229f8398cb2f9f53955db1503b
"serial: PL011: clear pending interrupts"
attempts to clear interrupts by writing to a
yet-unassigned memory address. This fixes the issue.

The breaking patch is marked for stable so should be
carried along with the other patch.

Cc: Shreshtha Kumar Sahu 
Cc: Russell King 
Cc: Nicolas Pitre 
Reported-by: Viresh Kumar 
Signed-off-by: Linus Walleij 
Tested-by: Grant Likely 
Signed-off-by: Greg Kroah-Hartman

serial: PL011: clear pending interrupts

2012-04-22T22:31:11+00:00

commit 9b96fbacda34079dea0638ee1e92c56286f6114a upstream.

Chanho Min reported that when the boot loader transfers
control to the kernel, there may be pending interrupts
causing the UART to lock up in an eternal loop trying to
pick tokens from the FIFO (since the RX interrupt flag
indicates there are tokens) while in practice there are
no tokens - in fact there is only a pending IRQ flag.

This patch address the issue with a combination of two
patches suggested by Russell King that clears and mask
all interrupts at probe() and clears any pending error
and RX interrupts at port startup time.

We suspect the spurious interrupts are a side-effect of
switching the UART from FIFO to non-FIFO mode.

Cc: Shreshtha Kumar Sahu 
Reported-by: Chanho Min 
Suggested-by: Russell King 
Signed-off-by: Linus Walleij 
Reviewed-by: Jong-Sung Kim 
Signed-off-by: Greg Kroah-Hartman

serial: amba-pl011: lock console writes against interrupts

2012-02-03T17:22:07+00:00

commit ef605fdb33883d687cff5ba75095a91b313b4966 upstream.

Protect against pl011_console_write() and the interrupt for
the console UART running concurrently on different CPUs.

Otherwise the console_write could spin for a long time
waiting for the UART to become not busy, while the other
CPU continuously services UART interrupts and keeps the
UART busy.

The checks for sysrq and oops_in_progress are taken
from 8250.c.

Signed-off-by: Rabin Vincent 
Reviewed-by: Srinidhi Kasagar 
Reviewed-by: Bibek Basu 
Reviewed-by: Shreshtha Kumar Sahu 
Signed-off-by: Linus Walleij 
Signed-off-by: Greg Kroah-Hartman

clk: amba-pl011: convert to clk_prepare()/clk_unprepare()

2011-09-27T08:25:52+00:00

Signed-off-by: Russell King

amba pl011: workaround for uart registers lockup

2011-06-16T19:01:57+00:00

This workaround aims to break the deadlock situation
which raises during continuous transfer of data for long
duration over uart with hardware flow control. It is
observed that CTS interrupt cannot be cleared in uart
interrupt register (ICR). Hence further transfer over
uart gets blocked.

It is seen that during such deadlock condition ICR
don't get cleared even on multiple write. This leads
pass_counter to decrease and finally reach zero. This
can be taken as trigger point to run this UART_BT_WA.

Workaround backups the register configuration, does soft
reset of UART using BIT-0 of PRCC_K_SOFTRST_SET/CLEAR
registers and restores the registers.

This patch also provides support for uart init and exit
function calls if present.

Signed-off-by: Shreshtha Kumar Sahu 
Signed-off-by: Linus Walleij 
Signed-off-by: Greg Kroah-Hartman

tty: remove invalid location line in file header

2011-04-19T23:33:36+00:00

remove invalid location line in each file header after location
moved from driver/char to driver/tty

Signed-off-by: Jovi Zhang 
Signed-off-by: Greg Kroah-Hartman

Fix common misspellings

2011-03-31T14:26:23+00:00

Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi

Merge branches 'aaci', 'mmci-dma', 'pl' and 'pl011' into drivers

2011-03-17T11:04:51+00:00

ARM: 6764/1: pl011: factor out FIFO to TTY code

2011-03-10T10:07:24+00:00

This piece of code was just slightly different between the DMA
and IRQ paths, in DMA mode we surely shouldn't read more than
256 character either, so factor this out in its own function and
use for both DMA and PIO mode.

Tested on Ux500 and U300.

Signed-off-by: Linus Walleij 
Signed-off-by: Russell King