linux-toradex.git/drivers/tty/serial/msm_serial.h, branch v4.4.73

tty: serial: msm: Add RX DMA support

2015-10-04T18:15:17+00:00

Add receive DMA support for UARTDM type of controllers.

Tested on APQ8064, which have UARTDM v1.3 and ADM DMA engine
and APQ8016, which have UARTDM v1.4 and BAM DMA engine.

Signed-off-by: Ivan T. Ivanov 
Signed-off-by: Greg Kroah-Hartman

tty: serial: msm: Add TX DMA support

2015-10-04T18:15:17+00:00

Add transmit DMA support for UARTDM type of controllers.

Tested on APQ8064, which have UARTDM v1.3 and ADM DMA engine
and APQ8016, which have UARTDM v1.4 and BAM DMA engine.

Signed-off-by: Ivan T. Ivanov 
Signed-off-by: Greg Kroah-Hartman

tty: serial: msm: replaces (1 << x) with BIT(x) macro

2015-10-04T18:15:17+00:00

Replaces (1 << x) with BIT(x) macro

Signed-off-by: Pramod Gurav 
Reviewed-by: Stephen Boyd 
Signed-off-by: Ivan T. Ivanov 
Signed-off-by: Greg Kroah-Hartman

tty: serial: msm: Add mask value for UART_DM registers

2015-10-04T18:15:17+00:00

The bit masks for RFR_LEVEL1 and STALE_TIMEOUT_MSB values in MR1 and
IPR registers respectively are different for UART and UART_DM hardware
cores. We have been using UART core mask values for these. Add the same
for UART_DM core.

There is no bit setting as UART_IPR_RXSTALE_LAST for UART_DM core so do
it only for UART core.

Signed-off-by: Pramod Gurav 
Reviewed-by: Stephen Boyd 
Signed-off-by: Ivan T. Ivanov 
Signed-off-by: Greg Kroah-Hartman

tty: serial: msm_serial: Remove dead code

2015-03-26T21:31:09+00:00

This config no longer exists now that mach-msm has been removed.
Delete it and the associated code.

Cc: Greg Kroah-Hartman 
Cc: David Brown 
Cc: Bryan Huntsman 
Cc: Daniel Walker 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

tty: serial: msm: Support sysrq on uartDM devices

2014-11-06T22:57:22+00:00

To properly support sysrq on uartDM hardware we need to properly
handle break characters. With the DM hardware the fifo can pack 4
characters at a time, where a break is indicated by an all zero
byte. Unfortunately, we can't differentiate between an all zero
byte for a break and an all zero byte of data, so try and do as
best we can. First unmask the RX break start interrupt and record
the interrupt when it arrives. Then while processing the fifo,
detect the break by searching for an all zero character as long
as we recently received an RX break start interrupt. This should
make sysrq work fairly well.

Cc: Frank Rowand 
Cc: Daniel Thompson 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

tty: serial: msm: Support big-endian CPUs

2014-07-10T23:10:42+00:00

To support big-endian CPUs use the string versions of the io
read/write macros on the TX/RX fifos and the non-raw variants of
the readl/writel macros throughout. This way we don't byteswap
the characters coming from the fifos but we properly deal with
the little-endian nature of the serial hardware while controlling
it.

Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

tty: serial: msm: Remove direct access to GSBI

2014-05-29T16:06:20+00:00

This patch removes direct access of the GSBI registers.  GSBI configuration
should be done through the GSBI driver directly.

Signed-off-by: Andy Gross 
Signed-off-by: Kumar Gala

msm_serial: Add support for poll_{get,put}_char()

2014-02-12T19:34:23+00:00

Implement the polling functionality for the MSM serial driver.
This allows us to use KGDB on this hardware.

Cc: David Brown 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

msm_serial: Make baud_code detection more dynamic

2013-07-26T23:13:29+00:00

Currently msm_set_baud_rate() assumes the uart clock rate is
1.8432 MHz. This is not always true, and limits our options to
program the baud rate. Instead of assuming the rate and
hard-coding the baud_code based on it, calculate the divider that
we want and try to find the closest baud_code that matches. This
allows us to support uarts with faster clock speeds.

Signed-off-by: Stephen Boyd 
Acked-by: David Brown 
Signed-off-by: Greg Kroah-Hartman