linux-toradex.git/drivers/tty/serial/sirfsoc_uart.h, branch v3.13.5

serial: sirf: remove duplicate defines

2013-10-29T23:26:54+00:00

This patch removes duplicate defines in drivers/tty/serial/sirfsoc_uart.h

Signed-off-by: Michael Opdenacker 
Signed-off-by: Greg Kroah-Hartman

serial: sirf: fix the amount of serial ports

2013-08-27T23:25:44+00:00

SiRFprimaII has three uart ports and three USP-based ports, so there
are totally six lines instead of five.

Signed-off-by: Qipan Li 
Signed-off-by: Barry Song 
Signed-off-by: Greg Kroah-Hartman

serial: sirf: define macro for some magic numbers of USP

2013-08-27T23:25:44+00:00

this patch clears some magic numbers for offset and bitshift
of USP registers.

Signed-off-by: Qipan Li 
Signed-off-by: Barry Song 
Signed-off-by: Greg Kroah-Hartman

serial: sirf: add DMA support using dmaengine APIs

2013-08-20T00:13:22+00:00

if we get the valid dma channels from dts, move to use dmaengine to do
rx/tx. because the dma hardware requires dma address and length to be
4bytes aligned, in this driver, we will still use PIO for non-aligned
bytes, and use dma for aligned bytes.

for rx, to keep the dmaengine always active, we use double-buffer, so
we issue two dma_desc at first, and maintain the status of both
1. dma transfer done: update in rx dma finish callback
2. dma buffer is inserted into tty: update in rx dma finish tasklet and
   rx timeout tasklet
so we re-issue the dma_desc only if both 1&2 are finished.

for tx, as we know the actual length for every transfer, we don't need
the above double buffering.

Signed-off-by: Qipan Li 
Signed-off-by: Barry Song 
Signed-off-by: Greg Kroah-Hartman

serial: sirf: fix the hardware-flow-ctrl for USP-based UART

2013-08-15T01:33:08+00:00

for USP-based UART, we use two gpios as RTS and CST pins.

Signed-off-by: Qipan Li 
Signed-off-by: Barry Song 
Signed-off-by: Greg Kroah-Hartman

serial: sirf: drop redundant pinctrl_get_select_default as pinctrl core does it

2013-08-15T01:33:08+00:00

pinctrl core will get default pinmux, so drop it in the sirfsoc serial driver.

Cc: Linus Walleij 
Signed-off-by: Barry Song 
Signed-off-by: Greg Kroah-Hartman

serial: sirf: make the driver also support USP-based UART

2013-08-12T18:29:53+00:00

Universal Serial Ports (USP) can be used as PCM, UART, SPI,
I2S etc. this makes the USP work as UART. the basic work
flow is same with UART controller, the main difference will
be offset of registers and bits.

this patch makes the old sirfsoc uart driver support both
sirf UART and USP-based UART by making their differences
become private data.

Signed-off-by: Qipan Li 
Signed-off-by: Barry Song 
Signed-off-by: Greg Kroah-Hartman

serial: sirf: add support for Marco chip

2013-08-12T18:29:53+00:00

the marco and coming new CSR multiple SoCs have SET/CLR pair for
INTEN registers to avoid some read-modify-write.

this patch adds support for this and make the driver support current
up and coming mp SoCs.

Signed-off-by: Barry Song 
Signed-off-by: Greg Kroah-Hartman

serial: sirf: only use lookup table to set baudrate when ioclk=150MHz

2013-01-18T01:18:55+00:00

The fast lookup table to set baudrate is only right when ioclk
is 150MHz. for most platforms, ioclk is 150MHz, but some boards
might set ioclk to other frequency.

so re-calc the clk_div_reg when ioclk is not 150MHz. this patch
also gets clk in probe and puts it in remove.

Signed-off-by: Barry Song 
Cc: Russell King 
Signed-off-by: Greg Kroah-Hartman

serial: sirf: add support for new SiRFmarco SMP SoC

2013-01-16T05:54:40+00:00

CSR SiRFmarco's UART IP is same with SiRFprimaII except that
it has two more uart ports.
this patch makes the old driver support new SiRFmarco as well:
1. add .compatible = "sirf,marco-uart" to OF match table
2. add two ports in the port table
3. take spin_lock in isr to avoid the conflict of threads opening
uart on CPU1 and isr running on CPU0.
For 3, we did see some problems on SiRFmarco as SiRFmarco is a
SMP SoC but the old SiRFprimaII is UP.

Signed-off-by: Barry Song 
Signed-off-by: Greg Kroah-Hartman