<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/tty/serial, branch v6.4-rc2</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge tag 'tty-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty</title>
<updated>2023-04-27T18:46:26+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2023-04-27T18:46:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b39667abcdcc754e32a0eb0df9cf49d45333d4ae'/>
<id>b39667abcdcc754e32a0eb0df9cf49d45333d4ae</id>
<content type='text'>
Pull tty / serial updates from Greg KH:
 "Here is the big set of tty/serial driver updates for 6.4-rc1.

  Nothing major, just lots of tiny, constant, forward development. This
  includes:

   - obligatory n_gsm updates and feature additions

   - 8250_em driver updates

   - sh-sci driver updates

   - dts cleanups and updates

   - general cleanups and improvements by Ilpo and Jiri

   - other small serial driver core fixes and driver updates

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'tty-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (87 commits)
  n_gsm: Use array_index_nospec() with index that comes from userspace
  tty: vt: drop checks for undefined VT_SINGLE_DRIVER
  tty: vt: distribute EXPORT_SYMBOL()
  tty: vt: simplify some cases in tioclinux()
  tty: vt: reformat tioclinux()
  tty: serial: sh-sci: Fix end of transmission on SCI
  tty: serial: sh-sci: Add support for tx end interrupt handling
  tty: serial: sh-sci: Fix TE setting on SCI IP
  tty: serial: sh-sci: Add RZ/G2L SCIFA DMA rx support
  tty: serial: sh-sci: Add RZ/G2L SCIFA DMA tx support
  serial: max310x: fix IO data corruption in batched operations
  serial: core: Disable uart_start() on uart_remove_one_port()
  serial: 8250: Reinit port-&gt;pm on port specific driver unbind
  serial: 8250: Add missing wakeup event reporting
  tty: serial: fsl_lpuart: use UARTMODIR register bits for lpuart32 platform
  tty: serial: fsl_lpuart: adjust buffer length to the intended size
  serial: fix TIOCSRS485 locking
  serial: make SiFive serial drivers depend on ARCH_ symbols
  tty: synclink_gt: don't allocate and pass dummy flags
  tty: serial: simplify qcom_geni_serial_send_chunk_fifo()
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull tty / serial updates from Greg KH:
 "Here is the big set of tty/serial driver updates for 6.4-rc1.

  Nothing major, just lots of tiny, constant, forward development. This
  includes:

   - obligatory n_gsm updates and feature additions

   - 8250_em driver updates

   - sh-sci driver updates

   - dts cleanups and updates

   - general cleanups and improvements by Ilpo and Jiri

   - other small serial driver core fixes and driver updates

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'tty-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (87 commits)
  n_gsm: Use array_index_nospec() with index that comes from userspace
  tty: vt: drop checks for undefined VT_SINGLE_DRIVER
  tty: vt: distribute EXPORT_SYMBOL()
  tty: vt: simplify some cases in tioclinux()
  tty: vt: reformat tioclinux()
  tty: serial: sh-sci: Fix end of transmission on SCI
  tty: serial: sh-sci: Add support for tx end interrupt handling
  tty: serial: sh-sci: Fix TE setting on SCI IP
  tty: serial: sh-sci: Add RZ/G2L SCIFA DMA rx support
  tty: serial: sh-sci: Add RZ/G2L SCIFA DMA tx support
  serial: max310x: fix IO data corruption in batched operations
  serial: core: Disable uart_start() on uart_remove_one_port()
  serial: 8250: Reinit port-&gt;pm on port specific driver unbind
  serial: 8250: Add missing wakeup event reporting
  tty: serial: fsl_lpuart: use UARTMODIR register bits for lpuart32 platform
  tty: serial: fsl_lpuart: adjust buffer length to the intended size
  serial: fix TIOCSRS485 locking
  serial: make SiFive serial drivers depend on ARCH_ symbols
  tty: synclink_gt: don't allocate and pass dummy flags
  tty: serial: simplify qcom_geni_serial_send_chunk_fifo()
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'acpi-bus', 'acpi-video' and 'acpi-misc'</title>
<updated>2023-04-24T16:01:57+00:00</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2023-04-24T16:01:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=21fc506cf5ef5de9c2cdc04036e35169d2b3e7d6'/>
<id>21fc506cf5ef5de9c2cdc04036e35169d2b3e7d6</id>
<content type='text'>
Merge ACPI bus type driver changes, ACPI backlight driver updates and a
series of cleanups related to of.h for 6.4-rc1:

 - Ensure that ACPI notify handlers are not running after removal and
   clean up code in acpi_sb_notify() (Rafael Wysocki).

 - Remove register_backlight_delay module option and code and remove
   quirks for false-positive backlight control support advertised on
   desktop boards (Hans de Goede).

 - Replace irqdomain.h include with struct declarations in ACPI headers
   and update several pieces of code previously including of.h
   implicitly through those headers (Rob Herring).

* acpi-bus:
  ACPI: bus: Ensure that notify handlers are not running after removal
  ACPI: bus: Add missing braces to acpi_sb_notify()

* acpi-video:
  ACPI: video: Remove desktops without backlight DMI quirks
  ACPI: video: Remove register_backlight_delay module option and code

* acpi-misc:
  ACPI: Replace irqdomain.h include with struct declarations
  fpga: lattice-sysconfig-spi: Add explicit include for of.h
  tpm: atmel: Add explicit include for of.h
  virtio-mmio: Add explicit include for of.h
  pata: ixp4xx: Add explicit include for of.h
  ata: pata_macio: Add explicit include of irqdomain.h
  serial: 8250_tegra: Add explicit include for of.h
  net: rfkill-gpio: Add explicit include for of.h
  staging: iio: resolver: ad2s1210: Add explicit include for of.h
  iio: adc: ad7292: Add explicit include for of.h
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Merge ACPI bus type driver changes, ACPI backlight driver updates and a
series of cleanups related to of.h for 6.4-rc1:

 - Ensure that ACPI notify handlers are not running after removal and
   clean up code in acpi_sb_notify() (Rafael Wysocki).

 - Remove register_backlight_delay module option and code and remove
   quirks for false-positive backlight control support advertised on
   desktop boards (Hans de Goede).

 - Replace irqdomain.h include with struct declarations in ACPI headers
   and update several pieces of code previously including of.h
   implicitly through those headers (Rob Herring).

* acpi-bus:
  ACPI: bus: Ensure that notify handlers are not running after removal
  ACPI: bus: Add missing braces to acpi_sb_notify()

* acpi-video:
  ACPI: video: Remove desktops without backlight DMI quirks
  ACPI: video: Remove register_backlight_delay module option and code

* acpi-misc:
  ACPI: Replace irqdomain.h include with struct declarations
  fpga: lattice-sysconfig-spi: Add explicit include for of.h
  tpm: atmel: Add explicit include for of.h
  virtio-mmio: Add explicit include for of.h
  pata: ixp4xx: Add explicit include for of.h
  ata: pata_macio: Add explicit include of irqdomain.h
  serial: 8250_tegra: Add explicit include for of.h
  net: rfkill-gpio: Add explicit include for of.h
  staging: iio: resolver: ad2s1210: Add explicit include for of.h
  iio: adc: ad7292: Add explicit include for of.h
</pre>
</div>
</content>
</entry>
<entry>
<title>tty: serial: sh-sci: Fix end of transmission on SCI</title>
<updated>2023-04-20T11:47:33+00:00</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2023-04-12T14:50:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f06c2a9000ebecbb461196e59ce063f742272902'/>
<id>f06c2a9000ebecbb461196e59ce063f742272902</id>
<content type='text'>
We need to set TE to "0" (i.e., disable serial transmission) to
get the expected behavior of the end of serial transmission.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20230412145053.114847-6-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We need to set TE to "0" (i.e., disable serial transmission) to
get the expected behavior of the end of serial transmission.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20230412145053.114847-6-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty: serial: sh-sci: Add support for tx end interrupt handling</title>
<updated>2023-04-20T11:47:33+00:00</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2023-04-12T14:50:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d61ae331d6f35183b38e0c992bc01bf15d8591c3'/>
<id>d61ae331d6f35183b38e0c992bc01bf15d8591c3</id>
<content type='text'>
As per the RZ/G2L users hardware manual (Rev.1.20 Sep, 2022), section
23.3.7 Serial Data Transmission (Asynchronous Mode), it is mentioned
that, set the SCR.TIE bit to 0 and SCR.TEIE bit to 1, after the last
data to be transmitted are written to the TDR.

This will generate tx end interrupt and in the handler set SCR.TE and
SCR.TEIE to 0.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20230412145053.114847-5-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As per the RZ/G2L users hardware manual (Rev.1.20 Sep, 2022), section
23.3.7 Serial Data Transmission (Asynchronous Mode), it is mentioned
that, set the SCR.TIE bit to 0 and SCR.TEIE bit to 1, after the last
data to be transmitted are written to the TDR.

This will generate tx end interrupt and in the handler set SCR.TE and
SCR.TEIE to 0.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20230412145053.114847-5-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty: serial: sh-sci: Fix TE setting on SCI IP</title>
<updated>2023-04-20T11:47:33+00:00</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2023-04-12T14:50:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1707ce2d1e4d701db28ba2250d9d72dcf762babc'/>
<id>1707ce2d1e4d701db28ba2250d9d72dcf762babc</id>
<content type='text'>
As per the RZ/G2L users hardware manual (Rev.1.20 Sep, 2022), section
23.3.7 Serial Data Transmission (Asynchronous Mode) it is mentioned
that the TE (transmit enable) must be set after setting TIE (transmit
interrupt enable) or these 2 bits are set to 1 simultaneously by a
single instruction. So set these 2 bits in single instruction.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20230412145053.114847-4-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As per the RZ/G2L users hardware manual (Rev.1.20 Sep, 2022), section
23.3.7 Serial Data Transmission (Asynchronous Mode) it is mentioned
that the TE (transmit enable) must be set after setting TIE (transmit
interrupt enable) or these 2 bits are set to 1 simultaneously by a
single instruction. So set these 2 bits in single instruction.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20230412145053.114847-4-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty: serial: sh-sci: Add RZ/G2L SCIFA DMA rx support</title>
<updated>2023-04-20T11:47:33+00:00</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2023-04-12T14:50:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cf383d123869574d1de4304ed73771d3eb5a3d40'/>
<id>cf383d123869574d1de4304ed73771d3eb5a3d40</id>
<content type='text'>
SCIFA IP on RZ/G2L SoC has the same signal for both interrupt
and DMA transfer request. Setting DMARS register for DMA transfer
makes the signal to work as a DMA transfer request signal and
subsequent interrupt requests to the interrupt controller
are masked. Similarly clearing DMARS register makes signal to work as
interrupt signal and subsequent interrupt requests to the interrupt
controller are unmasked.

Add SCIFA DMA rx support for RZ/G2L alike SoCs by disabling RXI line
interrupt and setting DMARS registers by DMA api for DMA transfer request.

Apart from this, we must set FIFO trigger to 1 for the expected behavior
of the receive transmission.

While at it replace the parameter irq to s-&gt;irqs[SCIx_RXI_IRQ] in
disable_irq_nosync() to match enable_irq() in sci_dma_rx_reenable_irq().

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20230412145053.114847-3-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
SCIFA IP on RZ/G2L SoC has the same signal for both interrupt
and DMA transfer request. Setting DMARS register for DMA transfer
makes the signal to work as a DMA transfer request signal and
subsequent interrupt requests to the interrupt controller
are masked. Similarly clearing DMARS register makes signal to work as
interrupt signal and subsequent interrupt requests to the interrupt
controller are unmasked.

Add SCIFA DMA rx support for RZ/G2L alike SoCs by disabling RXI line
interrupt and setting DMARS registers by DMA api for DMA transfer request.

Apart from this, we must set FIFO trigger to 1 for the expected behavior
of the receive transmission.

While at it replace the parameter irq to s-&gt;irqs[SCIx_RXI_IRQ] in
disable_irq_nosync() to match enable_irq() in sci_dma_rx_reenable_irq().

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20230412145053.114847-3-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty: serial: sh-sci: Add RZ/G2L SCIFA DMA tx support</title>
<updated>2023-04-20T11:47:33+00:00</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2023-04-12T14:50:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8749061be196b41a874d71c073c03171bf2741b2'/>
<id>8749061be196b41a874d71c073c03171bf2741b2</id>
<content type='text'>
SCIFA IP on RZ/G2L SoC has the same signal for both interrupt
and DMA transfer request. Setting DMARS register for DMA transfer
makes the signal to work as a DMA transfer request signal and
subsequent interrupt requests to the interrupt controller
are masked. Similarly clearing DMARS register makes signal to work as
interrupt signal and subsequent interrupt requests to the interrupt
controller are unmasked.

Add SCIFA DMA tx support for RZ/G2L alike SoCs by disabling TXI line
interrupt and setting DMARS registers by DMA api for DMA transfer request.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20230412145053.114847-2-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
SCIFA IP on RZ/G2L SoC has the same signal for both interrupt
and DMA transfer request. Setting DMARS register for DMA transfer
makes the signal to work as a DMA transfer request signal and
subsequent interrupt requests to the interrupt controller
are masked. Similarly clearing DMARS register makes signal to work as
interrupt signal and subsequent interrupt requests to the interrupt
controller are unmasked.

Add SCIFA DMA tx support for RZ/G2L alike SoCs by disabling TXI line
interrupt and setting DMARS registers by DMA api for DMA transfer request.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20230412145053.114847-2-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: max310x: fix IO data corruption in batched operations</title>
<updated>2023-04-20T11:46:13+00:00</updated>
<author>
<name>Jan Kundrát</name>
<email>jan.kundrat@cesnet.cz</email>
</author>
<published>2023-04-05T20:14:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3f42b142ea1171967e40e10e4b0241c0d6d28d41'/>
<id>3f42b142ea1171967e40e10e4b0241c0d6d28d41</id>
<content type='text'>
After upgrading from 5.16 to 6.1, our board with a MAX14830 started
producing lots of garbage data over UART. Bisection pointed out commit
285e76fc049c as the culprit. That patch tried to replace hand-written
code which I added in 2b4bac48c1084 ("serial: max310x: Use batched reads
when reasonably safe") with the generic regmap infrastructure for
batched operations.

Unfortunately, the `regmap_raw_read` and `regmap_raw_write` which were
used are actually functions which perform IO over *multiple* registers.
That's not what is needed for accessing these Tx/Rx FIFOs; the
appropriate functions are the `_noinc_` versions, not the `_raw_` ones.

Fix this regression by using `regmap_noinc_read()` and
`regmap_noinc_write()` along with the necessary `regmap_config` setup;
with this patch in place, our board communicates happily again. Since
our board uses SPI for talking to this chip, the I2C part is completely
untested.

Fixes: 285e76fc049c ("serial: max310x: use regmap methods for SPI batch operations")
Cc: stable@vger.kernel.org
Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Signed-off-by: Jan Kundrát &lt;jan.kundrat@cesnet.cz&gt;
Link: https://lore.kernel.org/r/79db8e82aadb0e174bc82b9996423c3503c8fb37.1680732084.git.jan.kundrat@cesnet.cz
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
After upgrading from 5.16 to 6.1, our board with a MAX14830 started
producing lots of garbage data over UART. Bisection pointed out commit
285e76fc049c as the culprit. That patch tried to replace hand-written
code which I added in 2b4bac48c1084 ("serial: max310x: Use batched reads
when reasonably safe") with the generic regmap infrastructure for
batched operations.

Unfortunately, the `regmap_raw_read` and `regmap_raw_write` which were
used are actually functions which perform IO over *multiple* registers.
That's not what is needed for accessing these Tx/Rx FIFOs; the
appropriate functions are the `_noinc_` versions, not the `_raw_` ones.

Fix this regression by using `regmap_noinc_read()` and
`regmap_noinc_write()` along with the necessary `regmap_config` setup;
with this patch in place, our board communicates happily again. Since
our board uses SPI for talking to this chip, the I2C part is completely
untested.

Fixes: 285e76fc049c ("serial: max310x: use regmap methods for SPI batch operations")
Cc: stable@vger.kernel.org
Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Signed-off-by: Jan Kundrát &lt;jan.kundrat@cesnet.cz&gt;
Link: https://lore.kernel.org/r/79db8e82aadb0e174bc82b9996423c3503c8fb37.1680732084.git.jan.kundrat@cesnet.cz
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: core: Disable uart_start() on uart_remove_one_port()</title>
<updated>2023-04-20T11:43:44+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2023-04-19T11:54:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=63f4c34561718a349d321105adab028cbf212d57'/>
<id>63f4c34561718a349d321105adab028cbf212d57</id>
<content type='text'>
While rebinding a uart device in a loop I noticed we may see a tx related
race on uart_remove_one_port():

uart_write from n_tty_write
n_tty_write from file_tty_write.constprop.0
file_tty_write.constprop.0 from vfs_write
vfs_write from ksys_write
ksys_write from ret_fast_syscall

Let's disallow tx on port-&gt;UPF_DEAD. This flag gets set before we start
tearing down the port in uart_remove_one_port().

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Link: https://lore.kernel.org/r/20230419115423.59957-1-tony@atomide.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
While rebinding a uart device in a loop I noticed we may see a tx related
race on uart_remove_one_port():

uart_write from n_tty_write
n_tty_write from file_tty_write.constprop.0
file_tty_write.constprop.0 from vfs_write
vfs_write from ksys_write
ksys_write from ret_fast_syscall

Let's disallow tx on port-&gt;UPF_DEAD. This flag gets set before we start
tearing down the port in uart_remove_one_port().

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Link: https://lore.kernel.org/r/20230419115423.59957-1-tony@atomide.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: 8250: Reinit port-&gt;pm on port specific driver unbind</title>
<updated>2023-04-20T11:43:41+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2023-04-18T10:14:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=04e82793f068d2f0ffe62fcea03d007a8cdc16a7'/>
<id>04e82793f068d2f0ffe62fcea03d007a8cdc16a7</id>
<content type='text'>
When we unbind a serial port hardware specific 8250 driver, the generic
serial8250 driver takes over the port. After that we see an oops about 10
seconds later. This can produce the following at least on some TI SoCs:

Unhandled fault: imprecise external abort (0x1406)
Internal error: : 1406 [#1] SMP ARM

Turns out that we may still have the serial port hardware specific driver
port-&gt;pm in use, and serial8250_pm() tries to call it after the port
specific driver is gone:

serial8250_pm [8250_base] from uart_change_pm+0x54/0x8c [serial_base]
uart_change_pm [serial_base] from uart_hangup+0x154/0x198 [serial_base]
uart_hangup [serial_base] from __tty_hangup.part.0+0x328/0x37c
__tty_hangup.part.0 from disassociate_ctty+0x154/0x20c
disassociate_ctty from do_exit+0x744/0xaac
do_exit from do_group_exit+0x40/0x8c
do_group_exit from __wake_up_parent+0x0/0x1c

Let's fix the issue by calling serial8250_set_defaults() in
serial8250_unregister_port(). This will set the port back to using
the serial8250 default functions, and sets the port-&gt;pm to point to
serial8250_pm.

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Link: https://lore.kernel.org/r/20230418101407.12403-1-tony@atomide.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When we unbind a serial port hardware specific 8250 driver, the generic
serial8250 driver takes over the port. After that we see an oops about 10
seconds later. This can produce the following at least on some TI SoCs:

Unhandled fault: imprecise external abort (0x1406)
Internal error: : 1406 [#1] SMP ARM

Turns out that we may still have the serial port hardware specific driver
port-&gt;pm in use, and serial8250_pm() tries to call it after the port
specific driver is gone:

serial8250_pm [8250_base] from uart_change_pm+0x54/0x8c [serial_base]
uart_change_pm [serial_base] from uart_hangup+0x154/0x198 [serial_base]
uart_hangup [serial_base] from __tty_hangup.part.0+0x328/0x37c
__tty_hangup.part.0 from disassociate_ctty+0x154/0x20c
disassociate_ctty from do_exit+0x744/0xaac
do_exit from do_group_exit+0x40/0x8c
do_group_exit from __wake_up_parent+0x0/0x1c

Let's fix the issue by calling serial8250_set_defaults() in
serial8250_unregister_port(). This will set the port back to using
the serial8250 default functions, and sets the port-&gt;pm to point to
serial8250_pm.

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Link: https://lore.kernel.org/r/20230418101407.12403-1-tony@atomide.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
