linux-toradex.git/drivers/usb/chipidea/bits.h, branch v4.1

usb: chipidea: support runtime power management for otg fsm mode

2015-03-18T15:19:12+00:00

This patch adds runtime power management support for otg fsm mode, since
A-device in a_idle state cannot detect data pulse irq after suspended, here
enable wakeup by connection before suspend to make it can be resumed by DP;
and handle wakeup from that state like SRP.

Signed-off-by: Li Jun 
Signed-off-by: Peter Chen 
Signed-off-by: Greg Kroah-Hartman

usb: chipidea: add chipidea revision information

2015-03-18T15:19:10+00:00

Define ci_get_revision API to know the controller revision
information according to chipidea 1.1a, 2.0a and 2.5a spec.
Besides, add one entry at struct ci_hdrc to indicate revision
information, it can be used for adding different code for
revisions, eg kinds of errata.

Reviewed-by: Stefan Agner 
Signed-off-by: Peter Chen 
Signed-off-by: Greg Kroah-Hartman

usb: chipidea: OTG fsm timers initialization

2014-04-24T19:56:35+00:00

This patch adds OTG fsm timers initialization, which use controller's 1ms
interrupt as timeout counter, also adds some local timers which are not
in otg_fsm_timer list.

Signed-off-by: Peter Chen 
Signed-off-by: Li Jun 
Signed-off-by: Greg Kroah-Hartman

usb: chipidea: add OTG fsm operation functions implementation

2014-04-24T19:56:35+00:00

Add OTG HNP and SRP operation functions implementation:
- charge vbus
- drive vbus
- connection signaling
- drive sof
- start data pulse
- add fsm timer
- delete fsm timer
- start host
- start gadget

Signed-off-by: Peter Chen 
Signed-off-by: Li Jun 
Signed-off-by: Greg Kroah-Hartman

usb: chipidea: udc: add maximum-speed = full-speed option

2014-02-25T01:07:52+00:00

This patch makes it possible to set the chipidea udc into full-speed only mode.
It is set by the oftree property "maximum-speed = full-speed".

Signed-off-by: Peter Chen 
Signed-off-by: Michael Grzeschik 
Signed-off-by: Marc Kleine-Budde 
Signed-off-by: Greg Kroah-Hartman

usb: chipidea: add ci_hdrc_enter_lpm API

2013-10-01T01:54:07+00:00

This API is used to let the PHY enter/leave low power mode.
Before the controller going to work(at probe/resume), it needs to let
the PHY leave low power mode.
After the controller stopping working(at remove/suspend), it needs to
let the PHY enter low power mode to save power consumption.

Signed-off-by: Peter Chen 
Signed-off-by: Greg Kroah-Hartman

usb: chipidea: otg: add otg file used to access otgsc

2013-08-14T19:37:19+00:00

This file is mainly used to access otgsc currently, it may
add otg related things in the future.

Tested-by: Marek Vasut 
Signed-off-by: Peter Chen 
Signed-off-by: Alexander Shishkin 
Signed-off-by: Greg Kroah-Hartman

usb: chipidea: cast PORTSC_PTS and DEVLC_PTS macros

2013-07-29T17:54:31+00:00

Fix the following build warnings on x86:

drivers/usb/chipidea/core.c: In function 'hw_phymode_configure':
drivers/usb/chipidea/core.c:226:3: warning: large integer implicitly truncated to unsigned type [-Woverflow]
drivers/usb/chipidea/core.c:230:3: warning: large integer implicitly truncated to unsigned type [-Woverflow]
drivers/usb/chipidea/core.c:243:3: warning: large integer implicitly truncated to unsigned type [-Woverflow]
drivers/usb/chipidea/core.c:246:3: warning: large integer implicitly truncated to unsigned type [-Woverflow]

Reported-by: Felipe Balbi 
Signed-off-by: Fabio Estevam 
Signed-off-by: Alexander Shishkin 
Signed-off-by: Greg Kroah-Hartman

usb: chipidea: add PTW, PTS and STS handling

2013-06-17T20:47:09+00:00

This patch makes it possible to configure the PTW, PTS and STS bits
inside the portsc register for host and device mode before the driver
starts and the phy can be addressed as hardware implementation is
designed.

Signed-off-by: Michael Grzeschik 
Signed-off-by: Marc Kleine-Budde 
Signed-off-by: Sascha Hauer 
Signed-off-by: Alexander Shishkin 
Signed-off-by: Greg Kroah-Hartman

usb: chipidea: add host role

2012-05-11T23:56:15+00:00

This adds EHCI host support to the chipidea driver. We want it to be
part of the hdrc driver and not a standalone (sub-)driver module, as
the structure of ehci-hcd.c suggests, so for chipidea controller we
hack it to not provide platform-related code, but only the ehci hcd.

The ehci-platform driver won't work for us here too, because the
controller uses the same registers for both device and host mode and
also otg-related bits, so it's not really possible to put ehci registers
into a separate resource.

This is not a pretty solution, but the alternative is exporting symbols
from the chipidea driver to a ehci-chipidea driver and doing all the
module refcounting.

Signed-off-by: Alexander Shishkin 
Cc: Alan Stern 
Signed-off-by: Greg Kroah-Hartman