Since we need to mount debugfs to show/store the things we want to debug, it is duplicated to add another configuration to enable it. Meanwhile, with CONFIG_USB_CHIPIDEA_DEBUG, we can't support chipidea debugfs at runtime. Signed-off-by: Peter Chen <peter.chen@freescale.com> Cc: Jun Li <jun.li@freescale.com>
Peter writes: USB: chipidea updates for v4.3-rc1 The main changes are adding several system interfaces for tuning performance, and each vendors can adjust them according to their design configurations. Others are tiny improvements, like more well siTD supports, USB_DEVICE_A_HNP_SUPPORT supports, etc.
The user can adjust it through dts or platform data Signed-off-by: Peter Chen <peter.chen@freescale.com>
It is used to configure controller parameters according to platform data, like speed, stream mode, etc, both host and device's initialization need it, most of code are the same for both roles, with this new interface, it can reduce the duplicated code and be easy to maintain in future. Signed-off-by: Peter Chen <peter.chen@freescale.com>
The register of ttctrl.ttha describes like below: - Internal TT Hub Address Representation - RW - Default = 0000000b This field is used to match against the Hub Address field in QH & siTD to determine if the packet is routed to the internal TT for directly attached FS/LS devices. If the Hub Address in the QH or siTD does not match this address then the packet will be broadcast on the High Speed ports destined for a downstream High Speed hub with the address in the QH/siTD. In silicon RTL, this entry only affects QH and siTD, and the hub.addr at both QH and siTD are 0 in ehci core for chipidea (with hcd->has_tt = 1). So, for QH, if the "usage_tt" flag at RTL is 0, set CI_HDRC_SET_NON_ZERO_TTHA will not affect QH (with non-hs device); for siTD, set this flag will change remaining space requirement for the last transaction from 1023 bytes to 188 bytes, it can increase the number of transactions within one frame, ehci periodic schedule code will not queue the packet if the frame space is full, so it is safe to set this flag for siTD. With this flag, it can fix the problem Alan Stern reported below: http://www.spinics.net/lists/linux-usb/msg123125.html And may fix Michael Tessier's problem too. http://www.spinics.net/lists/linux-usb/msg118679.html CC: stern@rowland.harvard.edu CC: michael.tessier@axiontech.ca Signed-off-by: Peter Chen <peter.chen@freescale.com>
After introduce usb otg properties, update ci_otg_is_fsm_mode conditions to be depending on both usb hardware properties and usb driver config, also resolve a compile issue in debug.c after the API change. Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <jun.li@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Current otg fsm timers are using controller 1ms irq and count it, this patch is to replace it with hrtimer solution, use one hrtimer for all otg timers. Signed-off-by: Li Jun <jun.li@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Define ci_get_revision API to know the controller revision information according to chipidea 1.1a, 2.0a and 2.5a spec. Besides, add one entry at struct ci_hdrc to indicate revision information, it can be used for adding different code for revisions, eg kinds of errata. Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Using hw_write_id_reg and hw_read_id_reg to write and read identification registers contents, they can be used to get controller information, change some system configurations, and so on. Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add runtime power management support. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>