<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers, branch v2.6.36-rc2</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel</title>
<updated>2010-08-22T18:03:27+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2010-08-22T18:03:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4238a417a91643e1162a98770288f630e37f0484'/>
<id>4238a417a91643e1162a98770288f630e37f0484</id>
<content type='text'>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (58 commits)
  drm/i915,intel_agp: Add support for Sandybridge D0
  drm/i915: fix render pipe control notify on sandybridge
  agp/intel: set 40-bit dma mask on Sandybridge
  drm/i915: Remove the conflicting BUG_ON()
  drm/i915/suspend: s/IS_IRONLAKE/HAS_PCH_SPLIT/
  drm/i915/suspend: Flush register writes before busy-waiting.
  i915: disable DAC on Ironlake also when doing CRT load detection.
  drm/i915: wait for actual vblank, not just 20ms
  drm/i915: make sure eDP PLL is enabled at the right time
  drm/i915: fix VGA plane disable for Ironlake+
  drm/i915: eDP mode set sequence corrections
  drm/i915: add panel reset workaround
  drm/i915: Enable RC6 on Ironlake.
  drm/i915/sdvo: Only set is_lvds if we have a valid fixed mode.
  drm/i915: Set up a render context on Ironlake
  drm/i915 invalidate indirect state pointers at end of ring exec
  drm/i915: Wake-up wait_request() from elapsed hang-check (v2)
  drm/i915: Apply i830 errata for cursor alignment
  drm/i915: Only update i845/i865 CURBASE when disabled (v2)
  drm/i915: FBC is updated within set_base() so remove second call in mode_set()
  ...
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (58 commits)
  drm/i915,intel_agp: Add support for Sandybridge D0
  drm/i915: fix render pipe control notify on sandybridge
  agp/intel: set 40-bit dma mask on Sandybridge
  drm/i915: Remove the conflicting BUG_ON()
  drm/i915/suspend: s/IS_IRONLAKE/HAS_PCH_SPLIT/
  drm/i915/suspend: Flush register writes before busy-waiting.
  i915: disable DAC on Ironlake also when doing CRT load detection.
  drm/i915: wait for actual vblank, not just 20ms
  drm/i915: make sure eDP PLL is enabled at the right time
  drm/i915: fix VGA plane disable for Ironlake+
  drm/i915: eDP mode set sequence corrections
  drm/i915: add panel reset workaround
  drm/i915: Enable RC6 on Ironlake.
  drm/i915/sdvo: Only set is_lvds if we have a valid fixed mode.
  drm/i915: Set up a render context on Ironlake
  drm/i915 invalidate indirect state pointers at end of ring exec
  drm/i915: Wake-up wait_request() from elapsed hang-check (v2)
  drm/i915: Apply i830 errata for cursor alignment
  drm/i915: Only update i845/i865 CURBASE when disabled (v2)
  drm/i915: FBC is updated within set_base() so remove second call in mode_set()
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/i915,intel_agp: Add support for Sandybridge D0</title>
<updated>2010-08-22T06:29:03+00:00</updated>
<author>
<name>Zhenyu Wang</name>
<email>zhenyuw@linux.intel.com</email>
</author>
<published>2010-08-19T01:46:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4fefe435626758b14e6c05d2a5f8d71a997c0ad6'/>
<id>4fefe435626758b14e6c05d2a5f8d71a997c0ad6</id>
<content type='text'>
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/i915: fix render pipe control notify on sandybridge</title>
<updated>2010-08-22T06:28:54+00:00</updated>
<author>
<name>Zhenyu Wang</name>
<email>zhenyuw@linux.intel.com</email>
</author>
<published>2010-08-19T01:46:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3fdef0205e69b80c4219f14b834cb85eb719039f'/>
<id>3fdef0205e69b80c4219f14b834cb85eb719039f</id>
<content type='text'>
This one is missed in last pipe control fix for sandybridge,
that really unmask interrupt bit for notify in render engine IMR.

Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This one is missed in last pipe control fix for sandybridge,
that really unmask interrupt bit for notify in render engine IMR.

Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>agp/intel: set 40-bit dma mask on Sandybridge</title>
<updated>2010-08-22T06:24:50+00:00</updated>
<author>
<name>Zhenyu Wang</name>
<email>zhenyuw@linux.intel.com</email>
</author>
<published>2010-08-19T01:46:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=877fdacf8291d7627f339885b5ae52c2f6061734'/>
<id>877fdacf8291d7627f339885b5ae52c2f6061734</id>
<content type='text'>
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/i915: Remove the conflicting BUG_ON()</title>
<updated>2010-08-22T06:21:13+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2010-08-15T09:52:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=156dadc180a1bd3a25d644ee6c361afc465ccd0e'/>
<id>156dadc180a1bd3a25d644ee6c361afc465ccd0e</id>
<content type='text'>
We now attempt to free "active" objects following a GPU hang as either
the GPU will be reset or the hang is permenant. In either case, the GPU
writes will not be flushed to main memory and it should be safe to
return that memory back to the system.

The BUG_ON(active) is thus overkill and can erroneously fire after a
EIO.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We now attempt to free "active" objects following a GPU hang as either
the GPU will be reset or the hang is permenant. In either case, the GPU
writes will not be flushed to main memory and it should be safe to
return that memory back to the system.

The BUG_ON(active) is thus overkill and can erroneously fire after a
EIO.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/i915/suspend: s/IS_IRONLAKE/HAS_PCH_SPLIT/</title>
<updated>2010-08-22T06:20:21+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2010-08-14T13:41:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=90eb77baaea35c591bd324b31e9eac032bd603c9'/>
<id>90eb77baaea35c591bd324b31e9eac032bd603c9</id>
<content type='text'>
For the shared paths on the next generation chipsets.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For the shared paths on the next generation chipsets.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/i915/suspend: Flush register writes before busy-waiting.</title>
<updated>2010-08-22T06:20:17+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2010-08-14T13:41:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=72bcb2690927f04c0479cd0d83825f09f3bf4d4f'/>
<id>72bcb2690927f04c0479cd0d83825f09f3bf4d4f</id>
<content type='text'>
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i915: disable DAC on Ironlake also when doing CRT load detection.</title>
<updated>2010-08-22T06:07:04+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2010-08-04T05:52:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d5dd96cb280993a6096b42ab082f9cfd9c7ae0bd'/>
<id>d5dd96cb280993a6096b42ab082f9cfd9c7ae0bd</id>
<content type='text'>
Like on Sandybridge, disabling the DAC here when doing CRT load detect
avoids forever hangs waiting on the hardware.

test procedure on HP 2740p:
boot with no VGA plugged in, start X,
plug in VGA monitor (1280x1024)
chvt 3
machine hangs waiting forever.

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Like on Sandybridge, disabling the DAC here when doing CRT load detect
avoids forever hangs waiting on the hardware.

test procedure on HP 2740p:
boot with no VGA plugged in, start X,
plug in VGA monitor (1280x1024)
chvt 3
machine hangs waiting forever.

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/i915: wait for actual vblank, not just 20ms</title>
<updated>2010-08-22T05:59:23+00:00</updated>
<author>
<name>Jesse Barnes</name>
<email>jbarnes@virtuousgeek.org</email>
</author>
<published>2010-08-18T20:20:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9d0498a2bf7455159b317f19531a3e5db2ecc9c4'/>
<id>9d0498a2bf7455159b317f19531a3e5db2ecc9c4</id>
<content type='text'>
Waiting for a hard coded 20ms isn't always enough to make sure a vblank
period has actually occurred, so add code to make sure we really have
passed through a vblank period (or that the pipe is off when disabling).

This prevents problems with mode setting and link training, and seems to
fix a bug like https://bugs.freedesktop.org/show_bug.cgi?id=29278, but
on an HP 8440p instead.  Hopefully also fixes
https://bugs.freedesktop.org/show_bug.cgi?id=29141.

Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Waiting for a hard coded 20ms isn't always enough to make sure a vblank
period has actually occurred, so add code to make sure we really have
passed through a vblank period (or that the pipe is off when disabling).

This prevents problems with mode setting and link training, and seems to
fix a bug like https://bugs.freedesktop.org/show_bug.cgi?id=29278, but
on an HP 8440p instead.  Hopefully also fixes
https://bugs.freedesktop.org/show_bug.cgi?id=29141.

Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.infradead.org/mtd-2.6</title>
<updated>2010-08-21T19:47:05+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2010-08-21T19:47:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=69b26c7ad00fd5b6129400725e2ffb95134a0e1b'/>
<id>69b26c7ad00fd5b6129400725e2ffb95134a0e1b</id>
<content type='text'>
* git://git.infradead.org/mtd-2.6:
  mtd: nand: Fix probe of Samsung NAND chips
  mtd: nand: Fix regression in BBM detection
  pxa3xx: fix ns2cycle equation
</content>
<content type='xhtml'>
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<pre>
* git://git.infradead.org/mtd-2.6:
  mtd: nand: Fix probe of Samsung NAND chips
  mtd: nand: Fix regression in BBM detection
  pxa3xx: fix ns2cycle equation
</pre>
</div>
</content>
</entry>
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